Ferroelectric Memory Stack With Oxygen Scavenging Interface

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Solution Overview

Problem

The semiconductor industry faces challenges in reducing feature sizes for increased integration density, leading to issues such as the formation of undesired interfacial layers between oxide semiconductor and ferroelectric layers, which affect device performance and reliability.

Innovation Solution

The implementation of an oxygen scavenging layer between the ferroelectric and conductive layers to absorb oxygen, preventing the formation of defects and improving the quality of the oxide semiconductor surface channel, thereby eliminating the interfacial layer and enhancing device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature size is reduced to increase integration density, then more components can be integrated into a given area, but undesired interfacial layers form between oxide semiconductor and ferroelectric layers

Engineering Contradiction:
Improveintegration densityVSAvoiddevice performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A nitrogen-containing interface layer is introduced between the oxide semiconductor layer and the ferroelectric layer to act as an intermediary that prevents oxygen diffusion. This intermediate layer eliminates the formation of undesired interfacial layers while allowing continued scaling for high integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The nitrogen-containing interface layer is formed in advance before depositing the ferroelectric layer. This preliminary action prevents oxygen from the oxide semiconductor layer from migrating to the interface during subsequent processing, thereby preventing interfacial layer formation before it occurs

Inventive Principle:
Principle #10Preliminary action

2Productivity

If feature size is reduced to increase integration density, then more components can be integrated into a given area, but threshold voltage shifting increases

Engineering Contradiction:
Improveintegration densityVSAvoidthreshold voltage control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The nitrogen-containing interface layer serves as a mediator that stabilizes the interface between the oxide semiconductor and ferroelectric layers, preventing oxygen-induced threshold voltage shifts. This allows precise threshold voltage control even as device dimensions are scaled down for higher integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If feature size is reduced to increase integration density, then more components can be integrated into a given area, but endurance decreases

Engineering Contradiction:
Improveintegration densityVSAvoiddevice endurance
Core Design Contradiction:
ProductivityVSDuration of action of stationary object

Solution Approach 1:

The nitrogen-containing interface layer acts as a protective intermediary that prevents oxygen diffusion and interfacial degradation over time. This intermediary layer maintains interface quality and device endurance even as devices are scaled down to achieve higher integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in improved endurance and reduced threshold voltage shifting, making it easier to read digital values stored in memory cells with reduced errors.

Implementation Method 1

A nitrogen-containing interface layer is formed between the oxide semiconductor layer and the ferroelectric layer

Methodology Applied
Scientific EffectAbsorption: Absorption (physical)

Data Source

PatentUS12193241B2Ferroelectric memory device and method of forming the same
Publication Date: 2025.01.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12193241B2 patent drawing
  • US12193241B2 patent drawing
  • US12193241B2 patent drawing

AI summary

The present disclosure, in some embodiments, relates to a ferroelectric memory device. The ferroelectric memory device includes a multi-layer stack disposed on a substrate. The multi-layer stack has a plurality of conductive layers and a plurality of dielectric layers stacked alternately. A channel layer penetrates through the plurality of conductive layers and the plurality of dielectric layers. A ferroelectric layer is disposed between the channel layer and both of the plurality of conductive layers and the plurality of dielectric layers. A plurality of oxygen scavenging layers are disposed along sidewalls of the plurality of conductive layer. The plurality of oxygen scavenging layers laterally separate the ferroelectric layer from the plurality of conductive layers.