Mitigating Edge Degradation in Ferroelectric Memory via Plasma Clean
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Ferroelectric memory devices experience signal degradation and edge defects during read and write operations, leading to reduced polarization and potential device failure due to fabrication process-related issues.
Innovation Solution
A plasma-based dry clean is employed during and/or after ferroelectric stack etching to mitigate edge degradation, removing debris and residual compounds that can cause shorting and performance degradation, thereby enhancing the uniformity of separation voltages across the memory array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If ferroelectric stack etching is performed during fabrication, then memory array formation is achieved, but edge degradation and signal degradation occur leading to non-uniform separation voltages
Solution Approach 1:
A plasma-based dry clean process is performed after ferroelectric stack etching to remove debris and residual compounds from the etched surfaces before subsequent processing steps. This preliminary cleaning action prevents edge degradation and ensures uniform separation voltages across the memory array by eliminating contaminants that would otherwise cause signal degradation and device failure
Solution Approach 2:
The patent converts the harmful effect of plasma etching (which leaves behind debris and residual compounds causing edge degradation) into a beneficial process by using the same plasma technology in a controlled dry clean step. The plasma-based dry clean selectively removes the harmful residues while preserving the ferroelectric material integrity, thereby transforming the etching byproduct into an opportunity for surface purification
2Ease of manufacture
If conventional fabrication processes are used, then manufacturing simplicity is maintained, but bit clamping and performance degradation occur
Solution Approach 1:
The patent introduces a plasma-based dry clean process as an intermediary step between ferroelectric stack etching and subsequent fabrication steps. This intermediate cleaning process acts as a mediator that removes debris and residual compounds without adding significant complexity to the overall fabrication flow, thereby preventing bit clamping and ensuring operational reliability while maintaining ease of manufacture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dry clean process effectively reduces edge defects and performance degradation, leading to improved operational reliability and data integrity by maintaining uniform separation voltages across ferroelectric memory cells, preventing bit clamping and enhancing the overall performance and lifespan of ferroelectric memory devices.
Implementation Method 1
A plasma-based dry clean is employed during and/or after ferroelectric stack etching to mitigate edge degradation, removing debris and residual compounds that can cause shorting and performance degradation
Data Source
AI summary
A ferroelectric memory device is fabricated while mitigating edge degradation. A bottom electrode is formed over one or more semiconductor layers. A ferroelectric layer is formed over the bottom electrode. A top electrode is formed over the ferroelectric layer. The top electrode, the ferroelectric layer, and the bottom electrode are patterned or etched. A dry clean is performed that mitigates edge degradation. A wet etch/clean is then performed.