Ferroelectric Memory Sidewall Spacers for Larger Read Windows
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Solution Overview
Problem
Ferroelectric memory devices with low orthorhombic phase concentration in the ferroelectric data storage structure face challenges in differentiating between data states during read operations, leading to small memory windows and reduced performance.
Innovation Solution
Incorporating stressed sidewall spacers on the upper electrode of the ferroelectric memory device to increase the orthorhombic phase concentration in peripheral regions of the ferroelectric data storage structure through an anneal process, enhancing the memory window size and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the ferroelectric data storage structure has low orthorhombic phase concentration, then the device structure is simpler and easier to manufacture, but the memory window size is small and the device cannot effectively differentiate between data states
Solution Approach 1:
The patent introduces stressed sidewall spacers that create localized stress fields in peripheral regions of the ferroelectric data storage structure. This causes different orthorhombic phase concentrations in different regions: peripheral regions have high orthorhombic phase concentration (improving memory window), while the central region maintains its original properties. This local differentiation resolves the contradiction by improving reliability in critical regions without requiring uniform modification of the entire structure.
Solution Approach 2:
The patent changes the stress state parameter of the ferroelectric material by introducing stressed sidewall spacers. The spacers apply compressive or tensile stress to the ferroelectric material, which induces phase transitions and increases orthorhombic phase concentration in peripheral regions. This parameter change approach enables control over memory window size without fundamentally altering the manufacturing process.
2Reliability
If stressed sidewall spacers are added to increase orthorhombic phase concentration, then the memory window size and read window size are improved, but the device structure becomes more complex
Solution Approach 1:
The patent segments the ferroelectric data storage structure into central and peripheral regions using sidewall spacers. The spacers act as boundaries that create distinct functional zones: the central region for data storage and peripheral regions with modified orthorhombic phase concentration for enhanced read performance. This segmentation allows the complex functionality to be achieved through localized modifications rather than uniform structural changes.
Solution Approach 2:
The sidewall spacers serve as intermediary structures that mediate between the electrode and the ferroelectric material. They transmit mechanical stress to the ferroelectric material without requiring direct contact or integration, thus improving memory window and read window sizes while adding minimal structural complexity. The spacers act as a buffer layer that enables phase control without complicating the overall device architecture.
3Reliability
If the orthorhombic phase concentration is increased in peripheral regions, then device-to-device variations are reduced and performance is enhanced, but the manufacturing process requires additional anneal steps
Solution Approach 1:
The patent performs the anneal process after forming the sidewall spacers, which have already been positioned to apply stress to specific regions. This preliminary positioning of the spacers allows the subsequent anneal to selectively modify only the peripheral regions where stress is applied, rather than requiring uniform annealing of the entire structure. This reduces manufacturing complexity by limiting the anneal's effect to where it is needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased orthorhombic phase concentration improves the read window size and reliability of the ferroelectric memory device, reducing device-to-device variations and enhancing the overall performance and reliability of the integrated chip.
Implementation Method 1
the one or more stressed sidewall spacers are configured to increase an orthorhombic phase concentration within the one or more peripheral regions of the ferroelectric data storage structure
Implementation Method 2
through an anneal process, enhancing the memory window size
Implementation Method 3
Ferroelectric random-access memory (FeRAM) devices are one promising candidate for a next generation non-volatile memory technology
Data Source
AI summary
The present disclosure relates to an integrated chip. The integrated chip includes a lower electrode disposed within a dielectric structure over a substrate. A ferroelectric data storage structure is disposed over the lower electrode and an upper electrode is disposed over the ferroelectric data storage structure. One or more stressed sidewall spacers are arranged on opposing sides of the upper electrode. The ferroelectric data storage structure has an orthorhombic phase concentration that varies from directly below the one or more stressed sidewall spacers to laterally outside of the one or more stressed sidewall spacers.