Ferroelectric Memory Temperature Update Timing

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Solution Overview

Problem

Ferroelectric memory devices face signal instability and noise issues during temperature updates, which can disrupt operations and affect the accuracy of read and write operations, especially near switching thresholds.

Innovation Solution

Implementing a temperature update mechanism that delays or withholds updates during critical operations, using a subset of the refresh cycle to access the temperature sensor and reconfigure circuits, and adjusting voltages based on temperature readings to minimize noise and maintain signal stability, while also reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If temperature update is performed continuously, then temperature compensation accuracy is improved, but signal stability deteriorates due to noise introduction during critical operations

Engineering Contradiction:
Improvetemperature compensation accuracyVSAvoidsignal stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements periodic temperature updates during non-critical intervals (refresh cycles) rather than continuous updates. The temperature sensor is activated periodically during refresh operations when the memory array is not performing critical read/write operations, thereby obtaining temperature compensation data without introducing noise during sensitive operations. This periodic action resolves the contradiction by balancing update frequency with operational stability.

Inventive Principle:
Principle #19Periodic action

2Speed

If temperature sensor is accessed during critical operations, then temperature update speed is improved, but operation reliability deteriorates due to noise and signal instability

Engineering Contradiction:
Improvetemperature update speedVSAvoidoperation reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent performs temperature sensing and updates during refresh cycles before critical operations begin. By completing temperature updates in advance during non-critical intervals, the system ensures temperature compensation data is ready for upcoming critical operations without interfering with them. This preliminary action allows fast temperature updates while maintaining operation reliability.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If temperature update components are active during all operations, then temperature compensation coverage is improved, but power consumption increases

Engineering Contradiction:
Improvetemperature compensation coverageVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent activates temperature update components periodically during refresh cycles rather than continuously during all operations. The temperature sensor and associated circuitry are enabled only during these periodic intervals when the memory array is in a non-critical state, providing comprehensive temperature compensation coverage over time while significantly reducing overall power consumption compared to continuous operation.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11256310B2Configuration update for a memory device based on a temperature of the memory device
Publication Date: 2022.02.22 MICRON TECHNOLOGY INC
  • US11256310B2 patent drawing
  • US11256310B2 patent drawing
  • US11256310B2 patent drawing

AI summary

Methods, systems, and devices for operating a ferroelectric memory cell or cells and, more particularly, a temperature update for a memory device are described. A memory array may be operated according to a timing cycle that includes a first interval for performing a first type of operation and a second interval for performing a second type of operation, where a duration of the first interval is greater than a duration of the second type of interval. A temperature related to a temperature of at least a portion of the memory array may be sampled during an interval of the second type, and the memory array may be reconfigured based at least in part on a sampled temperature. The first type of operation may then be performed on a reconfigured memory array during an interval of the first type.