Semiconductor Memory Device With Ferroelectric Gate Insulator

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Solution Overview

Problem

Current semiconductor memory devices face challenges in efficiently managing the polarization of ferroelectric films in ferroelectric transistors for data storage, particularly in maintaining stable threshold values during writing and erasing operations, which affects data retention and reading margins.

Innovation Solution

The semiconductor memory device incorporates a configuration where transistors with ferroelectric films for gate insulating films have varying channel impurity concentrations for word line drivers and peripheral circuits, allowing for controlled application of voltages to polarize the ferroelectric films effectively, thereby stabilizing threshold values and reducing manufacturing complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ferroelectric films are used in gate insulating films for memory cell transistors, then data storage capability is improved, but threshold value instability during writing and erasing operations occurs

Engineering Contradiction:
Improvedata storage capabilityVSAvoidthreshold value stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent applies different channel impurity concentrations to different transistor types: memory cell transistors use one concentration while peripheral circuit transistors use another. This local differentiation allows the ferroelectric films in memory cells to provide data storage functionality while peripheral circuits use different doping to maintain stable threshold values during voltage application operations.

Inventive Principle:
Principle #3Local quality

2Stability of the object's composition

If different transistor structures are used for memory cell arrays and peripheral circuits, then threshold value stability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvethreshold value stabilityVSAvoidtransistor structure variety
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent changes the channel impurity concentration parameter between memory cell transistors and peripheral circuit transistors. By adjusting this single parameter rather than changing overall transistor structure, the patent achieves different electrical characteristics (stable threshold values in peripheral circuits) while maintaining manufacturing simplicity and process compatibility.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If high voltage is applied to polarize ferroelectric films, then data writing capability is improved, but threshold value drift in peripheral circuits occurs

Engineering Contradiction:
Improvedata writing capabilityVSAvoidthreshold value drift
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent implements local quality differentiation by assigning different channel impurity concentrations to memory cell transistors versus peripheral circuit transistors. This allows high voltage to be applied effectively to polarize ferroelectric films in memory cells for data writing, while peripheral circuit transistors with different doping concentrations remain resistant to threshold value drift during the same high voltage operations.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances data storage reliability by maintaining stable threshold values during operations, increasing reading margins and simplifying the manufacturing process by allowing the use of transistors with the same structure in both memory cell arrays and peripheral circuits.

Implementation Method 1

a ferroelectric film is provided for a gate insulating film... a direction of polarization of a ferroelectric film is reversed to store data

Methodology Applied
Scientific EffectFerroelectric polarization: Polarisation

Implementation Method 2

a channel impurity concentration of a transistor to which a driving voltage which drives the word line is applied is different from a channel impurity concentration of a transistor to which a voltage which is lower than the driving voltage is applied

Methodology Applied
Scientific EffectImpurity conduction: Conduction (electrical)

Data Source

PatentUS8854914B2Semiconductor memory device
Publication Date: 2014.10.07 KIOXIA CORP
  • US8854914B2 patent drawing
  • US8854914B2 patent drawing
  • US8854914B2 patent drawing

AI summary

According to one embodiment, a memory cell, a word line, and a peripheral circuit are provided. In the memory cell, a ferroelectric film is provided for a gate insulating film. The word line is connected to a control gate electrode of the memory cell. In the peripheral circuit, ferroelectric films are provided for gate insulating films and the peripheral circuit is provided near the memory cell. Here, between the same conductive type transistors of the peripheral circuit, a channel impurity concentration of a transistor to which a driving voltage which drives the word line is applied is different from a channel impurity concentration of a transistor to which a voltage which is lower than the driving voltage is applied.