Ferroelectric Memory Structure With Variable Capacitor Impedances
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Solution Overview
Problem
Current ferroelectric memory technologies face challenges in increasing bit density, which is essential for improving storage capacity and efficiency.
Innovation Solution
The proposed ferroelectric memory structure incorporates a switch device and a ferroelectric capacitor structure with ferroelectric capacitors that have different top-view areas or thicknesses, allowing for multiple bits of data to be stored in a single memory cell by varying the impedances of the capacitors through different configurations such as series or parallel connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional ferroelectric memory structures use a single capacitor per memory cell, then the structure is simple, but the bit density is limited
Solution Approach 1:
The memory cell is segmented into multiple ferroelectric capacitors (first, second, third, and fourth capacitors) with different impedance values. Each capacitor can be independently controlled to store a bit of data, allowing a single memory cell to store multiple bits (e.g., 2 bits or more) thereby increasing bit density without proportionally increasing overall structure complexity
Solution Approach 2:
The patent introduces impedance as an additional dimension for data storage. By varying the impedance values of different capacitors (through different capacitor ratios such as 1:2, 1:3, 1:4), the system can encode multiple data states within the same physical space, effectively utilizing an additional degree of freedom for information storage
2Quantity of substance
If multiple ferroelectric capacitors are added to increase bit density, then storage capacity increases, but device complexity increases
Solution Approach 1:
Multiple ferroelectric capacitors are merged within a single memory cell structure, sharing common electrodes and control lines. The capacitors are arranged in a compact configuration where they can be electrically connected in series or parallel combinations, allowing multiple storage elements to coexist in a unified structure rather than as separate independent units
Solution Approach 2:
The different impedance capacitors serve multiple functions: they can be individually accessed for reading/writing specific bit positions, combined in various series-parallel configurations to represent different data values, and controlled through a unified control scheme using the same word lines and bit lines, thereby achieving multi-functionality without proportionally increasing control complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances bit density by enabling a single memory cell to store multiple bits of data, thereby increasing the storage capacity and efficiency of the memory device.
Implementation Method 1
The ferroelectric capacitor structure includes ferroelectric capacitors electrically connected. Each of the ferroelectric capacitors includes a first conductive layer, a second conductive layer, and a ferroelectric material layer.
Data Source
AI summary
A ferroelectric memory structure including a first conductive line, a second conductive line, and a memory cell is provided. The second conductive line is disposed on the first conductive line. The memory cell is disposed between the first and second conductive lines. The memory cell includes a switch device and a ferroelectric capacitor structure. The switch device is disposed between the first and second conductive lines. The ferroelectric capacitor structure is disposed between the first conductive line and the switch device. The ferroelectric capacitor structure includes ferroelectric capacitors electrically connected. Each of the ferroelectric capacitors includes a first conductive layer, a second conductive layer, and a ferroelectric material layer. The second conductive layer is disposed on the first conductive layer. The ferroelectric material layer is disposed between the first conductive layer and the second conductive layer. The ferroelectric material layers in the ferroelectric capacitors have different top-view areas.