Ferroelectric Memory Region Voting for Depolarization Recovery
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Solution Overview
Problem
Ferroelectric memory devices experience data depolarization due to thermal loads during packaging, leading to data inversion and failure, which existing methods cannot fully alleviate.
Innovation Solution
A ferroelectric memory device with an odd number of memory regions, including a read-out circuit, comparison circuit, and write circuit, allows for data comparison and rewriting, ensuring data reliability by storing identical programs across regions and utilizing rewritable regions for backup.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a thermal load is applied during packaging, then the ferroelectric memory can be assembled in an electronic apparatus, but the polarization state of the ferroelectric film becomes depolarized causing data inversion and failure
Solution Approach 1:
The memory device is divided into multiple independent memory regions (first memory region, second memory region, third memory region) that store identical program data. This segmentation allows the system to compare data across regions and identify depolarized regions through voting, thereby maintaining data integrity even when thermal depolarization occurs during packaging assembly.
Solution Approach 2:
The invention creates redundant copies of the same program data across multiple memory regions. By storing identical data in three separate regions, the system can use majority voting to recover the original data if one region becomes depolarized during thermal processing, thus preserving data integrity while enabling standard packaging assembly.
2Reliability
If one cycle of reference plate line is driven at first power-on, then depolarization is improved, but excessive depolarization causes previously written data to become inverted which cannot be relieved
Solution Approach 1:
The invention implements a feedback mechanism where readout data from multiple memory regions is compared by a comparison circuit. The comparison circuit determines whether data in each region matches the majority vote result, and if a mismatch is detected, the data is rewritten to correct the depolarization error. This feedback loop continuously monitors and corrects data integrity.
Solution Approach 2:
The invention performs preliminary data verification and correction at first power-on by comparing data across multiple memory regions before normal operation begins. The judgment circuit identifies whether this is the first power-on event, and if so, triggers the data comparison and rewriting process to correct any depolarization that occurred during packaging before the device is used.
3Reliability
If multiple memory regions are used for data backup, then data reliability is improved, but device complexity increases
Solution Approach 1:
The invention combines multiple functions into a unified memory structure: the same physical memory regions serve both as program storage and as backup regions. The comparison circuit and write circuit are integrated to work with these regions, allowing data verification and correction without requiring separate dedicated backup memory, thus limiting the increase in device complexity.
Solution Approach 2:
The memory regions are designed to serve multiple purposes: they function as the primary program storage region and simultaneously as backup regions for data verification. This multi-functionality reduces the need for additional dedicated backup memory structures, balancing data reliability improvement with acceptable device complexity.
Data Source
AI summary
A ferroelectric memory device includes: an odd number of memory regions, the odd number being at least three or higher; a readout circuit that reads data of 0 or 1 stored in the odd number of memory regions; a comparison circuit that compares readout data at corresponding addresses of the odd number of memory regions, and decides comparison data of 0 or 1 according to voting; and a write circuit that writes the comparison data in one region in the odd number of memory regions.