Ferroelectric NAND Flash Memory Voltage Control
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Solution Overview
Problem
Current semiconductor storage devices face challenges in efficiently managing threshold voltage variations during data writing operations, leading to potential errors and reduced storage reliability.
Innovation Solution
The semiconductor storage device employs a ferroelectric NAND flash memory configuration with a specific voltage application sequence and polarization control, utilizing a series of voltage steps and select transistor operations to manage the polarization of ferroelectric films, thereby limiting the increase in threshold voltage and maintaining data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a high voltage is applied to the gate of the first memory cell transistor to write data, then the data writing speed is improved, but the threshold voltage increases excessively leading to potential errors
Solution Approach 1:
The voltage application process is segmented into multiple stages: first applying a first voltage to the gate while turning on select transistors, then applying a second higher voltage after turning off the select transistors. This segmentation allows controlled threshold voltage increase only in the target cell without affecting neighboring cells, resolving the contradiction between writing speed and reliability.
Solution Approach 2:
The patent applies different voltages to different memory cell transistors based on their selection state. The first memory cell transistor receives a second voltage for writing, while other transistors receive a first voltage. This local differentiation ensures that only the target cell's threshold voltage increases significantly, preventing errors in other cells while maintaining fast writing in the target cell.
2Reliability
If the polarization of ferroelectric films is increased to improve data retention, then the storage reliability is improved, but the threshold voltage variation increases leading to potential errors
Solution Approach 1:
The patent controls the polarization of ferroelectric films by precisely managing the voltage application parameters. By applying a second voltage higher than the first voltage only to the selected first memory cell transistor after turning off select transistors, the polarization is increased in the target cell without causing excessive threshold voltage variation in other cells, thus improving data retention while maintaining threshold voltage control precision.
3Ease of operation
If a simple voltage application method is used to reduce operation complexity, then the ease of operation is improved, but the threshold voltage cannot be effectively controlled leading to data errors
Solution Approach 1:
The patent performs a preliminary action by turning off the first and second select transistors before applying the second voltage to the gate of the first memory cell transistor. This preliminary action isolates the target cell, allowing effective threshold voltage control during data writing. The method maintains reasonable operational simplicity while ensuring data writing accuracy through this preparatory step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses threshold voltage variations, enhances data writing precision, and improves storage reliability by controlling the polarization of ferroelectric films within the memory cell transistors.
Implementation Method 1
a first operation of applying a first voltage to a gate of the first memory cell transistor... a second operation of applying a second voltage which is higher than the first voltage to the gate of the first memory cell transistor... controlling the polarization of ferroelectric films
Data Source
AI summary
According to one embodiment, a semiconductor storage device includes: a first select transistor connected at a first end of a memory string; a second select transistor connected at a second end of the memory string; and a controller. In a write operation of writing data into a first memory cell transistor of the memory string, the controller performs: a first operation of applying a first voltage to a gate of the first memory cell transistor, while turning on the first and second select transistor; and a second operation of applying a second voltage higher than the first voltage to the gate of the first memory cell transistor, while turning off the first and second select transistor; and the second operation is performed after the first operation.