Ferroelectric NC-FET Gate Stack for Sub-60 mV Switching
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Solution Overview
Problem
The subthreshold swing in traditional MOSFETs is limited to 60 mV/decade, leading to higher off-state leakage currents and bottlenecks in voltage scaling for ultra-low power devices.
Innovation Solution
The integration of a negative capacitance field effect transistor (NC-FET) using a ferroelectric material in a hybrid gate-last manufacturing method, which includes an embedded ferroelectric metal-insulator-metal (MIM) capacitor structure, allows for sub-60 mV/decade subthreshold swing and reduced leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional MOSFET is used, then device structure is simple and manufacturing is easy, but subthreshold swing is limited to 60 mV/decade and off-state leakage current is high
Solution Approach 1:
The patent embeds a ferroelectric MIM capacitor structure within the gate stack of the FET. The capacitor is nested between the gate electrode and the channel, forming a composite structure where the capacitor's negative capacitance effect amplifies the gate voltage control over the channel, achieving sub-60 mV/decade subthreshold swing while maintaining a integrated device architecture
Solution Approach 2:
The patent employs a composite gate structure combining conductive materials (gate electrode) with ferroelectric materials (MIM capacitor). This composite structure leverages the negative capacitance property of the ferroelectric layer to enhance the effective gate voltage, enabling improved subthreshold characteristics without requiring entirely new device physics
2Use of energy by moving object
If traditional MOSFET is used, then power consumption is higher, but device operation is simpler
Solution Approach 1:
The patent changes the electrical parameters of the gate system by introducing the ferroelectric MIM capacitor, which provides negative capacitance. This parameter change enables the gate to achieve greater voltage control with smaller input signals, reducing the power required to switch the device while maintaining operational simplicity through standard FET terminal connections
3Use of energy by moving object
If voltage scaling is pursued for ultra-low power devices, then power consumption decreases, but subthreshold swing limitation causes bottlenecks
Solution Approach 1:
The patent applies preliminary anti-action by introducing the negative capacitance effect from the ferroelectric MIM capacitor to counteract the inherent 60 mV/decade subthreshold swing limitation of traditional MOSFETs. This preemptive measure enables voltage scaling to proceed effectively by providing the necessary electrostatic control before leakage and threshold voltage issues become problematic
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The NC-FET achieves improved subthreshold properties with reduced subthreshold swing and lower off-state leakage currents, enabling smaller voltage operation and more efficient power management in semiconductor devices.
Implementation Method 1
negative capacitance field effect transistor (NC-FET) using a ferroelectric material
Implementation Method 2
ferroelectric material layer disposed over the lower gate conductive layer
Data Source
AI summary
A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.