Ferroelectric Oxide Transistor Structure for Wider Subthreshold Operation
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Solution Overview
Problem
Transistors with silicon in the active layer have a narrow subthreshold region, limiting their applicability for analog calculations, and those with oxide semiconductors have high reliability but require a larger S value for wider operational voltage ranges.
Innovation Solution
Incorporating a ferroelectric layer with a crystal structure exhibiting ferroelectricity between the conductive layer and the oxide semiconductor layer, allowing for increased S value and wider subthreshold region operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a transistor uses silicon in the active layer, then manufacturing precision and reliability are improved, but the subthreshold region becomes narrow, limiting analog calculation applicability
Solution Approach 1:
The patent employs a composite material structure combining silicon semiconductor layer with ferroelectric material layer. The silicon layer provides reliable transistor operation and manufacturing precision, while the ferroelectric layer contributes to widened subthreshold region and enhanced analog calculation capability. This composite structure resolves the contradiction by integrating materials with complementary properties.
Solution Approach 2:
The patent changes the physical and chemical parameters of the transistor by introducing ferroelectric material and adjusting its thickness, composition ratio, and crystal orientation. These parameter changes transform the transistor characteristics, expanding the subthreshold region width and enabling analog calculation functions while maintaining silicon-based reliability.
2Reliability
If a transistor uses oxide semiconductor to achieve low leakage current, then reliability is improved, but a larger S value is required to ensure wide operational voltage range
Solution Approach 1:
The ferroelectric layer acts as an intermediary between the oxide semiconductor layer and the gate electrode. It mediates the electric field distribution and potential control, enabling the oxide semiconductor to achieve both low leakage current and reduced S value by optimizing the interface electric field and charge distribution.
3Productivity
If ferroelectric layer is incorporated to increase S value and widen subthreshold region, then analog calculation efficiency is improved, but device structure becomes more complex
Solution Approach 1:
The patent addresses device complexity by transitioning to a vertical stacked structure where the ferroelectric layer is positioned between the gate electrode and the oxide semiconductor layer. This dimensional arrangement integrates multiple functions (gate control, ferroelectric enhancement, and semiconductor operation) in a compact vertical configuration rather than expanding horizontally, thus improving analog calculation efficiency while managing structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability and S value of transistors, enabling more efficient analog calculations and broader voltage operation ranges, suitable for advanced semiconductor devices.
Implementation Method 1
a first conductive layer including a region overlapping with the oxide semiconductor layer with a ferroelectric layer therebetween. The ferroelectric layer includes a crystal having a crystal structure exhibiting ferroelectricity
Data Source
AI summary
A transistor having a large S value or a semiconductor device performing calculation utilizing a transistor operation in a subthreshold region is provided. The transistor includes an oxide semiconductor layer including a channel formation region, a gate electrode including a region overlapping with the oxide semiconductor layer with an insulating layer therebetween, and a first conductive layer including a region overlapping with the oxide semiconductor layer with a ferroelectric layer therebetween. In particular, the ferroelectric layer includes a crystal having a crystal structure exhibiting ferroelectricity.