Seed Layer Crystal Phase Tuning for Low-Temperature FeRAM

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Solution Overview

Problem

Existing methods for forming ferroelectric materials in FeRAM devices require high annealing temperatures, which can damage metal lines and vias, leading to degraded polarization performance and device integrity.

Innovation Solution

The use of a seed layer with a well-controlled tetragonal or orthorhombic crystal phase to facilitate the formation of ferroelectric layers at lower temperatures, protecting metal lines and vias while maintaining polarization performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high annealing temperatures are used to form ferroelectric materials, then ferroelectric layer formation is achieved, but metal lines and vias are damaged

Engineering Contradiction:
Improveferroelectric layer formationVSAvoiddamage to metal lines and vias
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A seed layer is introduced as an intermediary between the metal electrode and the ferroelectric layer. This seed layer has a specific crystal structure that facilitates low-temperature formation of the ferroelectric layer while protecting the underlying metal lines and vias from high temperature damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The seed layer is formed in advance before depositing the ferroelectric layer. This preliminary crystal structure preparation enables the ferroelectric material to form at lower temperatures, preventing thermal damage to metal interconnects while ensuring proper ferroelectric phase formation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If high annealing temperatures are used, then ferroelectric material forms, but polarization performance degrades

Engineering Contradiction:
Improveferroelectric material formationVSAvoidpolarization performance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention changes the temperature parameter from high to low by introducing the seed layer. The seed layer's specific crystal structure allows the ferroelectric material to achieve proper polarization at lower annealing temperatures, thereby maintaining high polarization performance while avoiding thermal degradation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The seed layer provides a specific crystal phase that facilitates the phase transition of the ferroelectric material at lower temperatures. This controlled phase transition ensures proper ferroelectric properties and polarization without requiring high temperatures that would degrade performance.

Inventive Principle:
Principle #36Phase transitions

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of ferroelectric layers with improved performance and integrity of metal lines and vias, enabling efficient and reliable operation of FeRAM devices.

Implementation Method 1

a first seed layer is deposited over the bottom electrode; performing a surface treatment on the first seed layer, wherein after the surface treatment the first seed layer includes at least one of a tetragonal crystal phase and an orthorhombic crystal phase

Methodology Applied
Scientific EffectCrystal phase transformation: Phase Change

Implementation Method 2

performing a thermal operation on the dielectric layer to thereby convert the dielectric layer into a ferroelectric layer

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS11869766B2Seed layer for ferroelectric memory device and manufacturing method thereof
Publication Date: 2024.01.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11869766B2 patent drawing
  • US11869766B2 patent drawing
  • US11869766B2 patent drawing

AI summary

A method includes: providing a bottom layer; forming a first transistor over a substrate; forming a bottom electrode over the transistor; depositing a first seed layer over the bottom electrode; performing a surface treatment on the first seed layer, wherein after the surface treatment the first seed layer includes at least one of a tetragonal crystal phase and an orthorhombic crystal phase; depositing a dielectric layer over the bottom layer adjacent to the first seed layer, the dielectric layer including an amorphous crystal phase; depositing an upper layer over the dielectric layer; performing a thermal operation on the dielectric layer to thereby convert the dielectric layer into a ferroelectric layer.