Ferroelectric Semiconductor Device with Back Gate
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving a balance of small size, high reliability, low power consumption, and high storage capacity, particularly in the development of next-generation ferroelectric memories using materials like hafnium oxide.
Innovation Solution
A semiconductor device design incorporating a ferroelectric capacitor and transistor structure with a back gate overlapping a semiconductor, utilizing insulators such as hafnium, zirconium, and oxygen, and electrodes with titanium and nitrogen, to enhance storage capacity and reliability while minimizing power consumption and size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional memory structures are used, then device area is reduced, but storage capacity and reliability deteriorate
Solution Approach 1:
The patent implements a three-dimensional stacked architecture where memory cells are arranged in multiple layers vertically. Each layer includes a transistor and capacitor structure stacked above the previous layer, enabling high storage capacity within a small footprint area by utilizing the vertical dimension for multi-layer integration
Solution Approach 2:
The patent employs nested structures where the back gate is positioned within the capacitor structure, and multiple functional layers are integrated within each other. The capacitor includes a first electrode, second electrode, and dielectric layer with the back gate nested inside, maximizing space utilization and storage capacity per unit area
2Reliability
If device size is reduced, then area occupation is minimized, but reliability deteriorates
Solution Approach 1:
The patent uses composite material structures including ferroelectric materials (HfO2, HfZrO3, Pb(Zr,Ti)O3) for capacitor dielectrics, oxide semiconductors (In-Ga-Zn-O) for transistor channels, and stacked insulator layers (SiO2, Si3N4, Al2O3) for gate dielectrics. These composite structures maintain high reliability through material properties while achieving miniaturization
Solution Approach 2:
The patent incorporates protective insulator layers and carefully designed interface structures between different materials to prevent degradation and ensure long-term reliability. The multi-layer insulator stack and ferroelectric capacitor design provide stability and durability against environmental factors and operational stress
3Use of energy by moving object
If conventional transistor structures are used, then manufacturing is simplified, but power consumption increases
Solution Approach 1:
The patent employs oxide semiconductor materials (In-Ga-Zn-O) with controlled oxygen stoichiometry and carrier concentration to achieve ultra-low off-state current. By optimizing the semiconductor layer composition and thickness parameters, the device achieves low power consumption while maintaining compatibility with existing CMOS fabrication processes
Solution Approach 2:
The patent introduces a back gate structure that acts as an intermediary control element between the substrate and the main transistor channel. This back gate enables independent threshold voltage control and enhances switching efficiency, reducing power consumption without complicating the overall manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design achieves a semiconductor device with improved storage capacity, reliability, and low power consumption, addressing the limitations of existing technologies by leveraging the properties of ferroelectric materials and optimized insulator and electrode compositions.
Implementation Method 1
The first insulator is a ferroelectric
Implementation Method 2
a capacitor including a pair of electrodes. The pair of electrodes are each in contact with the first insulator and comprise a region where the pair of electrodes overlap with each other with the first insulator therebetween
Implementation Method 3
a transistor including a gate, a back gate, and a semiconductor
Data Source
AI summary
A semiconductor device with a novel structure is provided. The semiconductor device includes a first electrode, a transistor including a back gate, a capacitor including a pair of electrodes, and a first insulator that can have ferroelectricity between the back gate of the transistor and a semiconductor. The first insulator overlaps with the semiconductor with a second insulator therebetween. One of a source electrode and a drain of the transistor is electrically connected to the first electrode. The other of the source and the drain of the transistor is electrically connected to one electrode of the pair of electrodes. The pair of electrodes are each in contact with the first insulator and include a region where the pair of electrodes overlap with each other with the first insulator therebetween. As the first insulator, a ferroelectric is used.