Ferroelectric Semiconductor Junction Memory Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Highly integrated non-volatile memory devices, such as resistive memory devices, face challenges in achieving high performance due to the independent characteristics of memory and switching elements, which complicates scaling and manufacturing, especially when an intermediate electrode is used.
Innovation Solution
A memory device with a p-type ferroelectric layer and an n-type oxide semiconductor layer bonded at a junction, forming a depletion region, eliminates the need for an intermediate electrode, allowing for direct contact and improved integration by using materials like PbZrTiO and ZnO, with the p-type ferroelectric layer being thicker than the n-type oxide semiconductor layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an intermediate electrode is used to connect the storage node and switching device, then the device structure is more flexible, but the integration density decreases and manufacturing complexity increases
Solution Approach 1:
The patent merges the storage node and switching device by forming a direct junction between the p-type ferroelectric layer and n-type oxide semiconductor layer, eliminating the intermediate electrode. This integration reduces structural complexity and improves integration density while maintaining functional flexibility through the bonded junction structure.
2Reliability
If the p-type ferroelectric layer is made thicker to improve memory characteristics, then the memory performance improves, but the memory cell height increases
Solution Approach 1:
The patent optimizes the thickness parameters of both the p-type ferroelectric layer and n-type oxide semiconductor layer to achieve a balance between memory characteristics and cell height. By adjusting these parameters within specific ranges, the invention maintains reliable memory performance while controlling the overall memory cell dimensions for high-density integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances memory and switching characteristics, simplifies manufacturing, and allows for easier scaling and integration of memory devices by reducing the height of the memory cell and improving electrical resistance changes based on polarization states.
Implementation Method 1
having a switching characteristic due to a depletion region existing in a junction between the p-type ferroelectric layer and the n-type oxide semiconductor layer
Implementation Method 2
a p-type ferroelectric layer and an n-type oxide semiconductor layer which are bonded to each other and having a switching characteristic due to a depletion region existing in a junction between the p-type ferroelectric layer and the n-type oxide semiconductor layer
Data Source
AI summary
Memory devices and methods of operating the same. A memory cell of a memory device may include a ferroelectric layer and a semiconductor layer bonded to each other. The ferroelectric layer may be of a p-type and the semiconductor layer may be of an n-type. The memory cell may have a switching characteristic due to a depletion region that exists in a junction between the ferroelectric layer and the semiconductor layer. The memory device may be a device writing data using a polarization change of the ferroelectric layer.