Ferroelectric Memory Sensing Isolation Circuit
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Solution Overview
Problem
Ferroelectric random access memory (F-RAM) devices face challenges in maintaining optimal balance and symmetry of sensing devices during read operations, which can lead to input offset voltages and reduced sensing margins due to asymmetry in sense amplifiers, especially when ferroelectric capacitors' manufacturing variability and electrical connections contribute to these issues.
Innovation Solution
The method involves selecting a ferroelectric memory cell, coupling pulse signals to interrogate it, isolating the sense amplifier electrically from the cell by de-asserting word-line signals, and enabling the sense amplifier after isolation to ensure balanced and symmetrical sensing, using either a one-transistor-one-capacitor (1T1C) or two-transistor-two-capacitor (2T2C) configuration, and comparing memory signals to reference or complementary signals to determine binary states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the sense amplifier remains electrically connected to the ferroelectric memory cell during read operation, then the memory signal can be continuously sensed, but the sense amplifier becomes unbalanced and asymmetric leading to input offset voltages and reduced sensing margins
Solution Approach 1:
The sense amplifier is electrically isolated from the ferroelectric memory cell before the read operation begins. This preliminary isolation prevents the accumulation of asymmetry and input offset voltages that would occur during continuous connection, ensuring the sense amplifier starts in a balanced state for accurate sensing
Solution Approach 2:
The patent applies preliminary anti-action by de-asserting the word-line signal to electrically isolate the sense amplifier from the memory cell before sensing. This counteracts the potential asymmetry that would develop during connection, preventing input offset voltages before they can degrade sensing margins
2Productivity
If the word-line signal remains asserted during sensing, then the memory cell remains electrically connected to the sense amplifier for continuous signal output, but this causes asymmetry in the sense amplifier and reduces read accuracy
Solution Approach 1:
The word-line signal is de-asserted before the read operation to preliminarily establish electrical isolation. This ensures the sense amplifier remains balanced and symmetric during sensing, preventing asymmetry-induced errors while maintaining signal output through proper timing sequences
Solution Approach 2:
The patent employs periodic assertion and de-assertion of the word-line signal in a controlled sequence. The signal is asserted to enable memory cell access, then de-asserted before sensing to maintain sense amplifier balance, creating a periodic pattern that optimizes both signal output and measurement precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures reliable and accurate read operations by maintaining optimal balance and symmetry of sensing devices, reducing input offset voltages and enhancing sensing margins, thereby improving data retrieval accuracy in F-RAM devices.
Implementation Method 1
Each memory cell in the array is a one-transistor-one-capacitor (1T1C) or two-transistor-two-capacitor (2T2C) cell including a ferroelectric capacitor
Data Source
AI summary
Semiconductor memory devices and methods of operating the same are provided. The method of operation may include the steps of selecting a ferroelectric memory cell for a read operation, coupling a first pulse signal to interrogate the selected ferroelectric memory cell, the selected ferroelectric memory cell outputting a memory signal to a bit-line in response to the first pulse signal, coupling the memory signal to a first input of a sense amplifier via the bit-line, electrically isolating the sense amplifier from the selected ferroelectric memory cell, and enabling the sense amplifier for sensing after the sense amplifier is electrically isolated from the selected ferroelectric memory cell. Other embodiments are also disclosed.