Ferroelectric SRAM Transistor Threshold Tuning for Low Leakage
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Solution Overview
Problem
Existing SRAM devices face limitations due to identical threshold voltages of access and storage transistors, resulting in low on-current, limited static noise margin, and reduced flexibility, which hinders the development of high-quality memory devices.
Innovation Solution
Incorporating a gate stack structure with a ferroelectric layer in SRAM transistors to create a negative capacitance effect, enhancing on-current and threshold voltage while allowing for adjustable threshold voltages through a pre-program operation, thereby improving sub-threshold swing and reducing leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a transistor is designed with relatively high threshold voltage to achieve low leakage current, then leakage current is reduced, but on-current becomes low
Solution Approach 1:
The patent applies parameter changes by introducing a ferroelectric layer in the gate stack structure, which fundamentally changes the electrical characteristics of the transistor. The ferroelectric layer enables the transistor to achieve both high threshold voltage (for low leakage) and high on-current simultaneously through its negative capacitance effect, resolving the traditional trade-off between these two parameters.
Solution Approach 2:
The patent uses composite materials by combining the ferroelectric layer with the gate stack structure (including gate electrode, gate insulator, and semiconductor substrate). This composite structure creates a negative capacitance effect that amplifies the gate voltage, enabling the transistor to achieve high on-current while maintaining high threshold voltage for low leakage current.
2Ease of manufacture
If access transistor and storage transistor have identical threshold voltage due to same fabrication processes, then manufacturing is simplified, but static noise margin is limited
Solution Approach 1:
The patent applies local quality by selectively forming ferroelectric layers in specific transistors (access transistors or storage transistors) rather than uniformly in all transistors. This allows different threshold voltages to be achieved in different locations of the SRAM cell, optimizing the static noise margin while maintaining a relatively simple fabrication process that only requires additional ferroelectric layer formation steps.
3Ease of manufacture
If conventional transistor structure is used, then fabrication is straightforward, but on-current and threshold voltage are limited
Solution Approach 1:
The patent applies preliminary action by forming the ferroelectric layer during the fabrication process before final transistor characterization. The ferroelectric layer is deposited and processed in advance, enabling the transistor to inherently possess enhanced on-current and threshold voltage characteristics without requiring post-fabrication adjustments or complex multi-fin structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables SRAM devices with high on-current, high threshold voltage, low leakage, and improved static noise margin, enhancing device performance and flexibility without the need for multi-fin designs, making them suitable for low-power applications.
Implementation Method 1
Incorporating a ferroelectric layer in the gate stack structure of SRAM transistors to create a negative capacitance effect
Data Source
AI summary
A static random-access memory (SRAM) cell including a transistor is introduced. The transistor includes substrate and gate stack structure disposed over the substrate, in which the gate stack structure includes a gate oxide layer, a ferroelectric layer, and a conductive layer. The gate oxide layer is disposed over the substrate; the ferroelectric layer is disposed over the gate oxide layer, wherein the ferroelectric layer has a negative capacitance effect; and the first conductive layer, disposed over the ferroelectric layer. A method of adjusting a threshold voltage of a transistor in the SRAM is also introduced.


