Ferroelectric Stack Barrier Layers for Memory Retention
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Solution Overview
Problem
Ferroelectric memory devices face challenges with leakage current and retention performance due to the thickness of ferroelectric switching layers (FSLs), as increasing thickness reduces leakage current but also decreases ferroelectric characteristics and causes phase transitions from ferroelectric to non-ferroelectric phases.
Innovation Solution
The implementation of ferroelectric stacks with at least two FSLs and one barrier layer, where the barrier layer suppresses grain growth and prevents unwanted crystal phase changes, maintaining optimal thickness for minimized leakage current and desired ferroelectric properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the thickness of ferroelectric switching layer is increased, then leakage current is reduced, but ferroelectric characteristics are decreased and phase transitions occur
Solution Approach 1:
The ferroelectric switching layer is divided into multiple thinner FSLs (first FSL and second FSL) separated by a barrier layer. This segmentation allows each FSL to maintain optimal thickness for ferroelectric properties while the stacked configuration collectively reduces leakage current, resolving the contradiction between thickness-related leakage reduction and thickness-related ferroelectric property degradation.
Solution Approach 2:
A barrier layer is introduced as an intermediary between the first and second FSLs. This barrier layer suppresses grain growth and prevents unwanted crystal phase changes in the FSLs, allowing them to maintain desired ferroelectric characteristics even when configured in a stacked arrangement for leakage current reduction.
2Object-generated harmful factors
If the thickness of ferroelectric switching layer is increased, then leakage current is reduced, but phase transitions from ferroelectric to non-ferroelectric occur
Solution Approach 1:
Dividing the thick FSL into multiple thinner FSLs prevents the crystal phase transition that occurs in thick FSLs, as each thin FSL maintains stable ferroelectric phase while the stacked structure achieves the leakage current reduction benefit.
Solution Approach 2:
The barrier layer acts as a mediator that suppresses grain growth and stabilizes the crystal phase of adjacent FSLs, preventing transitions from ferroelectric to non-ferroelectric phases while allowing the stacked configuration to reduce leakage current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances retention and endurance performance by reducing leakage current and maintaining ferroelectric characteristics, outperforming conventional ferroelectric stacks.
Implementation Method 1
the barrier layer suppresses grain growth and prevents unwanted crystal phase changes
Implementation Method 2
Ferroelectric-based memory devices are one promising candidate for next generation non-volatile memory technology because of their excellent electrical properties
Data Source
AI summary
Ferroelectric stacks are disclosed herein that can improve retention performance of ferroelectric memory devices. An exemplary ferroelectric stack has a ferroelectric switching layer (FSL) stack disposed between a first electrode and a second electrode. The ferroelectric stack includes a barrier layer disposed between a first FSL and a second FSL, where a first crystalline condition of the barrier layer is different than a second crystalline condition of the first FSL and/or the second FSL. In some embodiments, the first crystalline condition is an amorphous phase, and the second crystalline condition is an orthorhombic phase. In some embodiments, the first FSL and/or the second FSL include a first metal oxide, and the barrier layer includes a second metal oxide. The ferroelectric stack can be a ferroelectric capacitor, a portion of a transistor, and/or connected to a transistor in a ferroelectric memory device to provide data storage in a non-volatile manner.


