Ferroelectric Memory Stress Buffer Die
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Solution Overview
Problem
Ferroelectric random access memory (F-RAM) devices experience signal margin degradation due to high stress points caused by silica fillers in molded packages, which lead to clusters of bits with low signal margin.
Innovation Solution
A semiconductor device is packaged with a stress buffer die, such as a blank silicon die, mounted over the integrated circuit, and encapsulated in a molding compound, optionally with a polyimide layer between the stress buffer and semiconductor die to mitigate stress-induced signal degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polyimide is deposited directly on the F-RAM die to eliminate local stress effects, then stress protection is improved, but signal margin degrades due to additional thermal budget during curing
Solution Approach 1:
A stress buffer die is introduced as an intermediary component between the F-RAM die and the molding compound. This buffer die absorbs and distributes the stress from silica fillers, protecting the F-RAM die without requiring direct polyimide coating on the memory die itself, thereby avoiding the thermal budget issue that degrades signal margin.
Solution Approach 2:
The stress protection function is separated from the F-RAM die by placing a dedicated stress buffer die as a distinct component. This segmentation allows the buffer die to handle stress absorption while the F-RAM die maintains its signal integrity, avoiding the trade-off that would result from direct polyimide coating.
2Ease of manufacture
If silica fillers are used in the mold compound for packaging, then manufacturing cost and ease of manufacture are improved, but stress points are created that degrade signal margin
Solution Approach 1:
The stress buffer die is positioned beforehand between the F-RAM die and the molding compound containing silica fillers. This buffer die acts as a cushioning layer that absorbs the stress from the hard silica fillers before they can contact and damage the F-RAM die, thereby maintaining signal margin while allowing the use of standard silica-filled molding compounds.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress buffer die reduces stress points on the F-RAM, maintaining signal margin and eliminating the additional thermal budget issues associated with direct polyimide curing, thereby enhancing the reliability of F-RAM devices.
Implementation Method 1
The stress buffer die reduces stress points on the F-RAM, maintaining signal margin
Implementation Method 2
with a polyimide layer between the stress buffer and semiconductor die to mitigate stress-induced signal degradation
Data Source
AI summary
A device including a ferroelectric memory and methods of manufacturing the same are provided. In one embodiment, the device includes a semiconductor die with an integrated circuit fabricated thereon, a stress buffer die mounted to the semiconductor die overlying the integrated circuit, and a molding compound encapsulating the semiconductor die and the stress buffer die. Generally the integrated circuit includes a ferroelectric memory. In some embodiments, the device further includes a polyimide layer between the stress buffer and the semiconductor die. Other embodiments are also provided.