Ferroelectric Synaptic Device Stack for Cycling Durability

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Solution Overview

Problem

Conventional synaptic devices using flash memory technology suffer from deterioration due to repeated cycling operations, which affects their performance and durability.

Innovation Solution

A ferroelectric-based synaptic device is designed with an insulating layer stack comprising a charge trap layer and a ferroelectric layer, eliminating the need for a tunneling insulating layer to store weight information in a non-volatile state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a tunneling insulating layer is used in conventional flash memory-based synaptic devices, then weight information can be stored, but the device deteriorates during cycling operation

Engineering Contradiction:

Improvedevice durabilityVSAvoidcycling operation lifespan

Core Design Contradiction:

ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent removes the tunneling insulating layer from the conventional flash memory structure, extracting the problematic component that causes deterioration during cycling operations. This extraction eliminates the source of device degradation while preserving the essential charge trapping functionality through the charge trap layer alone.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs a composite insulating layer stack comprising multiple functional layers: a charge trap layer for weight information storage, a ferroelectric layer for non-volatile memory, and an interfacial layer for stability. This composite structure combines the advantages of different materials to achieve both cycling durability and reliable weight storage.

Inventive Principle:

Principle #40Composite materials

2Duration of action of stationary object

If a tunneling insulating layer is removed to improve cycling characteristics, then durability improves, but the ability to store weight information may be compromised

Engineering Contradiction:

Improvecycling operation lifespanVSAvoidweight information storage

Core Design Contradiction:

Duration of action of stationary objectVSLoss of information

Solution Approach 1:

The patent changes the physical and chemical parameters of the insulating layer stack by replacing the tunneling insulating layer with a charge trap layer having different trapping characteristics. This parameter change enables sustained cycling operation while maintaining weight information storage capability through the modified charge trapping mechanism.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces a ferroelectric layer as an intermediary component between the charge trap layer and the gate electrode. This intermediary layer provides non-volatile memory functionality, ensuring that weight information is preserved even when the charge trap layer undergoes cycling operations, thus preventing information loss.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Ease of manufacture

If conventional flash memory structure is used, then manufacturing is straightforward, but cycling operation causes performance deterioration

Engineering Contradiction:

Improvemanufacturing simplicityVSAvoidcycling characteristics

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent segments the insulating layer into distinct functional layers: a charge trap layer for weight storage, a ferroelectric layer for non-volatile memory, and an interfacial layer for structural stability. This segmentation allows each layer to be optimized for its specific function while maintaining overall manufacturing feasibility through established thin-film deposition techniques.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the cycling characteristics and durability of the synaptic device by preventing the deterioration typically associated with repeated operations, while allowing for efficient storage and retrieval of weight information.

Implementation Method 1

a ferroelectric layer made of a ferroelectric material; wherein weight information of the ferroelectric-based synaptic device is volatilely stored in the charge trap layer and non-volatilely stored in the ferroelectric layer

Methodology Applied

Scientific EffectFerroelectric polarization:

Implementation Method 2

a charge trap layer made of a material capable of storing or trapping charges and disposed on the channel region of a semiconductor body

Methodology Applied

Scientific EffectCharge trapping:

Data Source

PatentUS12224003B2Ferroelectric-based synaptic device and method of operating the synaptic device, and 3D synaptic device stack using the synaptic devices

Publication Date: 2025.02.11 SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

AI summary

Provided is a ferroelectric-based synaptic device and a three-dimensional synaptic device stack using the same. The synaptic device includes a source, a drain, a semiconductor body in which a channel region are formed, a gate electrode, and an insulating layer stack disposed between the semiconductor body and the gate electrode. The insulating layer stack includes: a charge trap layer disposed on the channel region of the semiconductor body and is made of a material capable of storing or trapping electric charges; a ferroelectric layer made of a ferroelectric material; and an insulating layer disposed between the charge trap layer and the ferroelectric layer. The synaptic device is characterized in that weight information is volatilely stored in the charge trap layer and non-volatilely stored in the ferroelectric layer.