Ferroelectric Ternary Inverter With Gate-Independent Constant Current

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Solution Overview

Problem

Existing binary CMOS devices face limitations in bit density and power consumption due to leakage currents and quantum tunneling effects, prompting the need for ternary logic devices, but existing ternary inverters require multiple voltage sources or complex circuit configurations.

Innovation Solution

A transistor design with a constant current formation layer, channel layer, and gate ferroelectric film, independent of gate voltage, along with a ternary inverter structure that includes well regions and constant current formation layers, enables a ternary inverter with three states and independent constant currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If binary CMOS devices are miniaturized to increase bit density, then processing speed and data volume increase, but leakage currents and quantum tunneling effects increase causing power consumption to rise

Engineering Contradiction:

Improvebit densityVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The patent transitions from binary logic (2 states) to ternary logic (3 states), fundamentally changing the operational parameters of the logic device. This parameter change allows for more efficient data representation and processing, reducing the number of transistors needed per bit and thereby reducing overall power consumption while maintaining or increasing bit density

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent replaces the conventional binary CMOS mechanical/electrical system with a ternary logic system using ferroelectric materials. This substitution introduces new physical mechanisms (ferroelectric polarization states) that enable three stable states with lower power consumption by eliminating the need for continuous refreshing and reducing leakage currents

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If existing ternary inverter technologies are implemented, then ternary logic functionality is achieved, but multiple voltage sources or complex circuit configurations are required

Engineering Contradiction:

Improveternary logic functionalityVSAvoidcircuit configuration

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the functionality of multiple voltage sources and complex circuit elements into a single integrated ternary inverter structure. By combining the ferroelectric memory function and logic inversion function into one device, it eliminates the need for separate voltage sources and complex circuit configurations while maintaining full ternary logic functionality

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The ternary inverter is designed to perform multiple functions simultaneously: it provides three-state logic inversion, maintains data storage capability through ferroelectric polarization, and operates with simplified voltage requirements. This multi-functionality reduces the need for additional dedicated components and simplifies the overall circuit architecture

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a transistor and ternary inverter with a constant current independent of gate voltage, enhancing bit density and reducing power consumption by maintaining three distinct states without the need for multiple voltage sources or complex configurations.

Implementation Method 1

a gate ferroelectric film provided between the gate electrode and the channel layer

Methodology Applied

Scientific EffectFerroelectric effect:

Implementation Method 2

The constant current formation layer may form a constant current between the constant current formation layer and a source/drain region, which is a drain, of the pair of source/drain regions. The constant current may be independent of a gate voltage applied to the gate electrode

Methodology Applied

Scientific EffectConstant current formation:

Implementation Method 3

An electric field may be formed between the constant current formation layer and the source/drain region, which is a drain, of the pair of source/drain regions, and an intensity of the electric field may be greater than or equal to 10^6 V/cm

Methodology Applied

Scientific EffectElectric field formation: Electric Field

Data Source

PatentUS12154950B2Transistor, ternary inverter comprising same, and transistor manufacturing method

Publication Date: 2024.11.26 TERNELL CO LTD

AI summary

Provided is a transistor including: a constant current formation layer; a channel layer provided on the constant current formation layer; a pair of source/drain regions spaced apart from each other, with the channel layer therebetween on the constant current formation layer; a gate electrode provided on the channel layer; and a gate ferroelectric film provided between the gate electrode and the channel layer.