Ferroelectric Field-Effect Transistor With Ion Conductor Layer

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Solution Overview

Problem

Conventional ferroelectric field-effect transistors require high read-out voltages that can disturb the polarization of memory cells, limiting the ability to achieve low-voltage, non-destructive read-out operations in non-volatile memory systems.

Innovation Solution

Incorporating an ion conductor layer between the semiconductor and ferroelectric layers in ferroelectric field-effect transistors, allowing for low-voltage non-destructive read-out operations by reducing the electric potential required for source-drain bias, while maintaining high charge carrier concentrations and data retention times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional ferroelectric field-effect transistors are used, then high charge carrier concentrations can be achieved, but high read-out voltages are required that disturb the polarization of memory cells

Engineering Contradiction:
Improvecharge carrier concentrationVSAvoidpolarization disturbance
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

An ion conductor layer is introduced as an intermediary between the ferroelectric gate insulator and the organic semiconductor. This intermediate layer enables the generation of high transversal electric fields at the semiconductor interface through ion accumulation, allowing high charge carrier concentrations to be achieved without requiring high gate voltages that would disturb the ferroelectric polarization. The ion conductor acts as a mediator that transforms the electric field from the ferroelectric layer into localized high fields at the semiconductor interface.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the electrical parameters of the gate insulator system by introducing an ion conductor layer with high ionic mobility. This layer enables the system to generate extremely high transversal electric fields (up to 10^9 V/m) at the semiconductor interface at very low gate-source voltages (less than 1 V), fundamentally altering the voltage-field relationship compared to conventional ferroelectric transistors.

Inventive Principle:
Principle #35Parameter changes

2Power

If high read-out voltages are applied to achieve sufficient source-drain bias, then adequate charge carrier concentration is obtained, but the ferroelectric polarization is disturbed

Engineering Contradiction:
Improvesource-drain biasVSAvoidferroelectric polarization
Core Design Contradiction:
PowerVSStability of the object's composition

Solution Approach 1:

The ion conductor layer serves as a mediator that decouples the source-drain bias requirement from the gate voltage. By introducing this intermediate layer, the system can achieve the necessary source-drain bias for adequate power operation while the gate voltage remains low enough to preserve ferroelectric polarization stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention fundamentally changes the operating voltage parameters by enabling high transversal electric fields (10^9 V/m) to be generated at the semiconductor interface through ion accumulation in the ion conductor layer, rather than through direct high gate-source voltage application. This allows adequate source-drain bias to be achieved with gate voltages below 1 V, preserving ferroelectric polarization.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If electrolyte gate insulator is used to achieve low operating voltages, then gate operating voltage is reduced below 1 V, but device complexity increases

Engineering Contradiction:
Improvegate operating voltageVSAvoiddevice structure
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The ion conductor layer performs multiple functions simultaneously: it acts as part of the gate insulator system enabling low operating voltages, serves as an ion transport medium generating high transversal electric fields, and functions as an interface layer between the ferroelectric layer and semiconductor. This multi-functionality reduces the need for additional separate components, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The gate insulator system is constructed as a composite structure combining the ferroelectric layer and the ion conductor layer. This composite material approach enables the system to achieve low operating voltages (below 1 V) through the synergistic effects of ferroelectric polarization and ion accumulation, while maintaining a relatively simple two-layer structure.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The introduction of an ion conductor layer enables read-out voltages as low as 0.2 V, improving data retention, programming cycle endurance, and reducing manufacturing costs, while maintaining low operating voltages and flexible device manufacturing capabilities.

Implementation Method 1

The polarization of the electrolyte gate insulator is accompanied by a drift of ions towards the gate/electrolyte and electrolyte/semiconductor interfaces. This polarization establishes two electric double layers across which the entire electric potential generated by the gate-source bias voltage drops. The electric double layers generate high transversal electric fields (10^9 Vm−1) already at very low gate-source voltages

Methodology Applied
Scientific EffectIon accumulation:

Implementation Method 2

The polarization of the electrolyte gate insulator is accompanied by a drift of ions towards the gate/electrolyte and electrolyte/semiconductor interfaces. This polarization establishes two electric double layers across which the entire electric potential generated by the gate-source bias voltage drops

Methodology Applied
Scientific EffectElectric double layer formation:

Implementation Method 3

The latter arises from the high charge carrier concentration induced in the semiconductor by the ferroelectric polarization of the gate insulator

Methodology Applied
Scientific EffectFerroelectric polarization:

Implementation Method 4

ferroelectric field-effect transistor

Methodology Applied
Scientific EffectField effect:

Data Source

PatentUS9318596B2Ferroelectric field-effect transistor
Publication Date: 2016.04.19 ACREO SWEDISH ICT
  • US9318596B2 patent drawing
  • US9318596B2 patent drawing
  • US9318596B2 patent drawing

AI summary

A ferroelectric field-effect transistor device includes: a semiconductor layer; a ferroelectric layer; and an ion conductor layer arranged between the semiconductor layer and the ferroelectric layer and in contact with the semiconductor layer. Methods for producing the ferroelectric field-effect transistor device and using the ferroelectric field-effect transistor device in non-volatile memory devices that reduce a readout voltage to a voltage as low as 0.2 V are also disclosed.