Ferroelectric Transistor Barrier Layer for Moisture-Induced Vt Stability

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Solution Overview

Problem

The challenge in semiconductor integrated circuits is the prevention of gas diffusion, particularly water vapor, which causes positive-bias-stress-induced threshold voltage shifts in transistors, affecting their performance and reliability.

Innovation Solution

Incorporation of gas impermeable layers within the transistor structure, such as aluminum oxide and titanium oxide, to prevent gas diffusion to the channel layer, thereby maintaining transistor properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If gas impermeable layers are incorporated into the transistor structure, then reliability is improved by preventing gas diffusion, but device complexity increases due to additional layers

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidtransistor structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A gas impermeable layer is inserted between the channel layer and the gate electrode/ferroelectric layer to act as a barrier that prevents gas diffusion. This intermediary layer blocks the path of gas molecules (water vapor, oxygen) that would otherwise diffuse into the channel layer and cause threshold voltage shifts, thereby protecting the transistor reliability without requiring fundamental changes to the transistor architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The transistor structure is enhanced by combining multiple materials with complementary properties: the channel layer (semiconductor material), the gas impermeable layer (barrier material such as aluminum oxide, titanium oxide, or nitrogen-doped silicon oxide), and the ferroelectric/gate materials. This composite structure leverages the gas-blocking properties of the impermeable layer while maintaining the electrical functionality of the other layers, resolving the contradiction between reliability improvement and structural complexity.

Inventive Principle:
Principle #40Composite materials

2Stability of the object's composition

If gas impermeable layers are added to prevent water vapor diffusion, then threshold voltage stability is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidlayer deposition precision
Core Design Contradiction:
Stability of the object's compositionVSManufacturing precision

Solution Approach 1:

The thickness of the gas impermeable layer is optimized to a specific range (e.g., 1-10 nm) that provides sufficient gas barrier properties while minimizing the impact on device performance and easing manufacturing precision requirements. By adjusting this critical parameter, the layer becomes thin enough to be deposited with standard semiconductor fabrication techniques yet thick enough to effectively block gas diffusion, thereby stabilizing threshold voltage without excessively tightening manufacturing tolerances.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents large positive-bias-stress-induced threshold voltage shifts due to oxygen and water absorption, enhancing transistor reliability and performance.

Implementation Method 1

Incorporation of gas impermeable layers within the transistor structure, such as aluminum oxide and titanium oxide, to prevent gas diffusion to the channel layer

Methodology Applied
Scientific EffectGas impermeability: Diffusion Barrier

Data Source

PatentUS12464755B2Integrated circuit, transistor and method of fabricating the same
Publication Date: 2025.11.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12464755B2 patent drawing
  • US12464755B2 patent drawing
  • US12464755B2 patent drawing

AI summary

A transistor includes a gate electrode, a ferroelectric layer, a channel layer, a gas impermeable layer, a dielectric layer, a source line and a bit line. The ferroelectric layer is disposed on the gate electrode. The channel layer is disposed on the ferroelectric layer. The gas impermeable layer is disposed in between the channel layer and the gate electrode, and in contact with the ferroelectric layer. The dielectric layer is surrounding the ferroelectric layer and the channel layer, and in contact with the gas impermeable layer. The source line and the bit line are embedded in the dielectric layer and connected to the channel layer.