Ferroelectric Transistor Static RAM Cell for Non-Volatile Storage
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Solution Overview
Problem
Existing electronic data storage techniques face challenges in maintaining non-volatile storage of logic states during power-down events, leading to data loss and increased complexity and costs in scaling semiconductor devices.
Innovation Solution
Incorporating a non-volatile storage element, such as a ferroelectric transistor, into a static storage cell structure that allows for volatile write and read operations at low latency, enabling non-volatile storage of logic states during power-down and re-establishment upon power-up without additional overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If flash memories are used for non-volatile storage, then data retention during power-down is improved, but access speed deteriorates and device complexity increases
Solution Approach 1:
The patent applies dynamics by enabling the storage system to switch between two operational modes: volatile mode for high-speed access during power-on, and non-volatile mode for data retention during power-down. The system dynamically adapts its behavior based on power state, combining the speed of volatile memory with the retention capability of non-volatile memory without sacrificing access performance during active operation.
Solution Approach 2:
The patent implements multi-functionality by designing a storage system that can operate in both volatile and non-volatile modes using the same hardware infrastructure. The storage device universally handles both high-speed volatile storage and energy-retentive non-volatile storage, eliminating the need for separate storage systems and reducing overall device complexity while maintaining both speed and reliability.
2Reliability
If floating gate-type storage transistors are used, then non-volatile storage capability is improved, but manufacturing complexity and costs increase
Solution Approach 1:
The patent merges the non-volatile storage functionality directly into the existing CMOS transistor structure by integrating a non-volatile storage element (such as a ferroelectric transistor) as part of the standard logic circuitry. This combination allows the storage function to be embedded within the logic device itself, reducing the need for separate floating gate structures and simplifying the manufacturing process while maintaining non-volatile capability.
Solution Approach 2:
The patent applies parameter changes by modifying the electrical characteristics of standard transistors through the integration of non-volatile materials (e.g., ferroelectric materials in the gate dielectric). This changes the transistor's behavior to retain state information without requiring the complex floating gate electrode structures, thereby reducing manufacturing complexity while achieving non-volatile storage capability.
3Speed
If static memory structures are used, then access speed is improved, but data retention during power-down deteriorates
Solution Approach 1:
The patent applies dynamics by enabling the storage system to switch between two operational modes: volatile mode for high-speed access during power-on, and non-volatile mode for data retention during power-down. The system dynamically adapts its behavior based on power state, combining the speed of volatile memory with the retention capability of non-volatile memory without sacrificing access performance during active operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for seamless operation by maintaining logic states across power cycles, reducing electronic overhead and complexity, and enabling efficient non-volatile storage without compromising standard read and write capabilities.
Implementation Method 1
In other approaches, the ferroelectric effect has been exploited so as to provide circuit elements, such as resistors, transistors and the like, in which a ferroelectric material may be polarized in order to appropriately affect the operational behavior.
Data Source
AI summary
The present disclosure provides a storage cell or storage structure having a static RAM-like operational behavior while nevertheless providing non-volatile storage capability on a single bit basis. To this end, a non-volatile storage element, such as a ferroelectric transistor element, may be provided within an inverter structure so as to allow the storage of a logic state at any desired operational phase by increasing the voltage difference used for operating the inverter structure. In illustrative embodiments, the stored logic state may be re-established during a power-up event.