Ferroelectric Vertical Memory Device for Low Write Voltage
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Solution Overview
Problem
Current memory devices face limitations such as high write voltage, slow operation speed, and short lifespan, which affect their reliability and integrity, particularly in non-volatile memory devices like flash memory.
Innovation Solution
A memory device with a vertically laminated structure featuring insulation layers and lower electrodes alternately stacked, covered by a ferroelectric material-based dielectric layer and an upper electrode, enhancing electrical properties and integration by using ferroelectric materials like lead zirconate titanate or bismuth ferrite, and employing specific manufacturing processes like etching and deposition methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional flash memory structure is used, then market occupancy is high, but write voltage is high and operation speed is slow
Solution Approach 1:
The patent transitions from a conventional planar memory structure to a vertical three-dimensional structure. The memory stack includes vertically stacked lower electrodes, insulation layers, and upper electrodes arranged in multiple layers along the vertical dimension, enabling higher integration density and improved electrical characteristics while reducing write voltage requirements
Solution Approach 2:
The patent employs composite material structures including ferroelectric materials (PBZT, PZT, or HfO2) as dielectric layers combined with conductive oxide materials (ITO, FTO, or ZnO) for electrodes. This composite approach enables simultaneous achievement of low write voltage through ferroelectric properties and high operation speed through optimized conductivity
2Duration of action of stationary object
If flash memory device is used, then non-volatile storage is achieved, but lifespan is short
Solution Approach 1:
The patent utilizes ferroelectric materials with switchable polarization states as the core dielectric layer. The polarization direction can be reversibly switched between upward and downward states through applied voltage, enabling non-volatile data storage with high write endurance and extended device lifespan through fatigue-resistant ferroelectric properties
3Reliability
If vertically laminated structure with ferroelectric material is used, then electrical properties are improved, but manufacturing complexity increases
Solution Approach 1:
The memory device is segmented into repeating unit cells, each comprising a lower electrode, insulation layer, upper electrode, and ferroelectric dielectric layer. This modular segmentation enables standardized manufacturing processes and simplifies the production of large-scale integrated memory arrays with consistent electrical properties
Solution Approach 2:
The vertically laminated structure serves multiple functions simultaneously: the ferroelectric dielectric layer provides both data storage through polarization switching and electrical isolation between stacked electrodes. The insulation layers provide both structural support and electrical isolation, reducing the number of separate components needed and simplifying manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves the electrical properties and integrity of memory devices, enabling higher reliability, faster operation, and extended lifespan by leveraging the ferroelectric material's polarization properties to control ion movement and optimize electrode interactions.
Implementation Method 1
the first dielectric layer includes a ferroelectric material
Data Source
AI summary
The present disclosure relates to a memory device, and more particularly, to a memory device including a substrate, a plurality of vertical structures disposed on the substrate and including insulation layers and lower electrodes, which are alternately laminated with each other, wherein the vertical structures are aligned in a first direction parallel to a top surface of the substrate and a second direction crossing the first direction, an upper electrode disposed on a top surface and side surfaces of each of the vertical structures, and a first dielectric layer disposed between the upper electrode and the vertical structures to cover the top surface and the side surfaces of each of the vertical structures. Here, the first dielectric layer includes a ferroelectric material.