Ferromagnetic Core Layer for Semiconductor Package Warpage Control

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Solution Overview

Problem

Fan-out semiconductor packages face challenges in manufacturing due to warpage caused by differences in thermal expansion coefficients of materials, making it difficult to transfer panels and maintain process accuracy during large-scale production.

Innovation Solution

Incorporating a core layer made of ferromagnetic material in the semiconductor package frame, which allows physical fixation to a magnetic plate, thereby maintaining flatness and preventing warpage during manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a fan-out semiconductor package is manufactured at a panel level with large size, then productivity is improved, but warpage occurs due to difference in coefficients of thermal expansion making it difficult to transfer the panel

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidpanel flatness
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent changes the magnetic property parameter of the core layer by using ferromagnetic material, which enables magnetic attraction to the magnetic plate. This parameter change allows the panel to be stably fixed during manufacturing processes, preventing warpage while maintaining large-size panel manufacturing for high productivity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces a magnetic plate as an intermediary element that interacts with the ferromagnetic core layer. This intermediary provides a stable base for panel fixation, enabling accurate transfer and processing of large-size panels without warpage issues

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If materials with different coefficients of thermal expansion are used for semiconductor chip, redistribution layer, and other components, then functionality and versatility are improved, but warpage occurs making it difficult to maintain process accuracy

Engineering Contradiction:
Improvepackage functionalityVSAvoidprocess accuracy
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent changes the magnetic property parameter of the core layer to ferromagnetic, enabling magnetic fixation to the magnetic plate. This fixation method compensates for warpage caused by thermal expansion differences, maintaining process accuracy while allowing use of diverse materials for enhanced functionality

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies preliminary anti-action by using magnetic attraction force to counteract the warpage tendency caused by thermal expansion differences. The magnetic plate and ferromagnetic core layer create a restraining force that prevents deformation during manufacturing processes

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables easier and more accurate manufacturing of semiconductor packages by preventing warpage and allowing for precise stacking and redistribution of connection pads, enhancing the package's rigidity and uniformity.

Implementation Method 1

a core layer formed of a ferromagnetic material

Methodology Applied
Scientific EffectMagnetic force: Magnetism

Data Source

PatentUS11239148B2Semiconductor package
Publication Date: 2022.02.01 SAMSUNG ELECTRONICS CO LTD
  • US11239148B2 patent drawing
  • US11239148B2 patent drawing
  • US11239148B2 patent drawing

AI summary

A semiconductor package includes a core layer formed of a ferromagnetic material, and includes a frame passing through the core layer and having a through-hole, a semiconductor chip disposed in the through-hole of the frame, and having an active surface on which a connection pad is disposed, and an inactive surface opposite to the active surface, an encapsulant covering at least a portion of the semiconductor chip, and a first connection structure including a first redistribution layer disposed on the active surface of the semiconductor chip and electrically connected to the connection pad.