Current-Reuse FET Amplifier Bias Control for Stable Drain Current

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Solution Overview

Problem

Current GaAs-based FET amplifiers in depression mode face challenges in maintaining a constant drain current due to process variations, leading to significant changes in drain current and gain characteristics, especially when operating with a single positive power source and limited withstand voltage, making it difficult to reduce current consumption and ensure stable operation in milliwave band applications.

Innovation Solution

A current reuse type FET amplifier is designed with additional transistors, resistances, and diodes to independently control the gate voltages of FETs, allowing for adjustments based on process variations, thereby reducing drain current and voltage variations, and ensuring operation within the FET's withstand voltage range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a current reuse type circuit configuration is used to reduce power consumption, then current consumption is reduced, but drain current varies significantly due to process variations

Engineering Contradiction:
Improvecurrent consumptionVSAvoiddrain current stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent adjusts the gate voltage of the FET to compensate for process variations. By changing the gate voltage parameter, the drain current is stabilized despite variations in transistor characteristics due to manufacturing process differences, thereby maintaining reliable operation while using the current reuse configuration.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If additional transistors and control circuits are added to stabilize drain current, then drain current stability is improved, but device complexity increases

Engineering Contradiction:
Improvedrain current stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a feedback mechanism where the drain current is monitored and the gate voltage is adjusted accordingly to maintain stable operation. This feedback approach stabilizes the drain current without requiring complex additional circuitry, as the control leverages existing circuit elements and their interrelationships.

Inventive Principle:
Principle #23Feedback

3Reliability

If gate voltage is adjusted to compensate for process variations, then drain current stability is improved, but control complexity increases

Engineering Contradiction:
Improvegain characteristics stabilityVSAvoidbias control complexity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent implements a self-adjusting bias control mechanism where the circuit automatically compensates for process variations through inherent feedback relationships. The gate voltage adjustment is performed autonomously based on the operating conditions, eliminating the need for external manual calibration or complex control systems.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11012036B2Current reuse type field effect transistor amplifier
Publication Date: 2021.05.18 MITSUBISHI ELECTRIC CORP
  • US11012036B2 patent drawing
  • US11012036B2 patent drawing
  • US11012036B2 patent drawing

AI summary

A current reuse type FET amplifier according to the present invention has a capacitance provided between a drain of a first FET in a first stage and a gate of a second FET in a next stage, electrically separates a gate voltage of the second FET from a drain voltage of the first FET, and includes a control circuit controlling the gate voltage of the first FET and the gate voltage of the second FET so that a variation of a drain current of the second FET and a variation of a drain voltage of the first FET are reduced in accordance with a variation of a saturation current Idss of the FET. Furthermore, the current reuse type FET amplifier according to the present invention uses only a depression mode FET to provide a circuit configuration operable with a positive single power source.