Gate Cavity Barrier Layer Segmentation for FET Threshold Control
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Solution Overview
Problem
Conventional field effect transistors face challenges in precisely controlling the voltage threshold as transistor size decreases, leading to issues with transistor density and performance in high-performance processor devices.
Innovation Solution
A barrier layer stack is formed in the base and sidewalls of a gate cavity with specific metal layers, allowing for precise control of the voltage threshold by removing the second barrier layer from the sidewalls, enabling more precise voltage control and reducing the effects of barrier layers on the gate work function.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If barrier layers are formed on the sidewalls of the gate cavity, then barrier protection is provided, but the voltage threshold control precision deteriorates
Solution Approach 1:
The barrier layer is segmented into two distinct regions: a base region that remains intact to provide barrier protection, and a sidewall region that is selectively removed to improve voltage threshold control. This segmentation allows different portions of the barrier layer to serve different functions, resolving the contradiction between maintaining barrier protection and achieving precise voltage threshold control.
Solution Approach 2:
Different regions of the barrier layer are treated differently: the base region maintains barrier properties while the sidewall region is removed. This local differentiation in quality and function allows the structure to simultaneously provide barrier protection where needed while eliminating unwanted barrier effects in other regions, thereby resolving the technical contradiction.
2Productivity
If transistor size is decreased to increase transistor density, then transistor density is improved, but voltage threshold control precision deteriorates
Solution Approach 1:
By segmenting the barrier layer into base and sidewall portions and selectively removing the sidewall portion, the invention enables smaller transistor dimensions while maintaining precise voltage threshold control. The segmentation allows the barrier protection to be concentrated where it is most needed (at the base) while eliminating unwanted barrier effects at the sidewalls that would otherwise interfere with voltage control in scaled devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for improved control of the voltage threshold, reducing leakage and shifting, while maintaining barrier protection, thus enhancing transistor performance and density.
Implementation Method 1
depositing a first metal layer in the cavity via radio frequency based physical vapor deposition
Data Source
AI summary
An improved field effect transistor and method of fabrication are disclosed. A barrier layer stack is formed in the base and sidewalls of a gate cavity. The barrier layer stack has a first metal layer and a second metal layer. A gate electrode metal is deposited in the cavity. The barrier layer stack is thinned or removed on the sidewalls of the gate cavity, to more precisely control the voltage threshold of the field effect transistor.