FET Bias Stabilization Circuit for Consistent Amplifier Gain

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Solution Overview

Problem

The gain of amplifying apparatuses becomes inconsistent due to changes in source-drain resistance and threshold voltage of FETs during manufacturing and operation, especially as transistor sizes decrease, leading to instability in drain current and voltage.

Innovation Solution

A bias stabilization circuit is introduced, which includes a comparison circuit that adjusts the bias voltage of the second FET to match the output voltage of the bias Gm compensation circuit, ensuring the bias voltage at the connection node between the first and second FETs remains stable, thereby stabilizing the gain of the amplifier.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If transistor sizes are reduced to improve integration density, then productivity increases, but manufacturing precision deteriorates due to inconsistency in threshold voltage and source-drain resistance

Engineering Contradiction:
Improveintegration densityVSAvoidthreshold voltage consistency
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent implements a feedback mechanism where the bias circuit monitors the actual drain current of the FET and adjusts the bias voltage accordingly. The circuit uses the relationship between gate voltage and drain current to automatically compensate for manufacturing variations, ensuring that the amplifier gain remains stable despite inconsistencies in threshold voltage and source-drain resistance caused by reduced transistor sizes.

Inventive Principle:
Principle #23Feedback

2Productivity

If transistor sizes are reduced to improve integration density, then productivity increases, but reliability deteriorates due to gain inconsistency

Engineering Contradiction:
Improveintegration densityVSAvoidgain stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The bias circuit continuously monitors the amplifier's actual operating conditions and adjusts the bias voltage to maintain consistent gain. By using feedback from the drain current measurement, the circuit compensates for variations caused by smaller transistor sizes, ensuring reliable and consistent amplifier performance across different manufacturing batches and operating conditions.

Inventive Principle:
Principle #23Feedback

3Reliability

If bias voltage is increased to stabilize drain current, then reliability improves, but device complexity increases

Engineering Contradiction:
Improvedrain current stabilityVSAvoidbias circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bias circuit is designed to automatically adjust itself based on the actual drain current conditions without requiring external control signals or complex adjustment mechanisms. The circuit uses the inherent relationship between gate voltage and drain current in FETs to self-regulate the bias voltage, maintaining stable drain current while avoiding the need for additional control circuits or manual adjustments.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7629853B2Amplifying apparatus and bias stabilization circuit
Publication Date: 2009.12.08 FUJITSU LTD
  • US7629853B2 patent drawing
  • US7629853B2 patent drawing
  • US7629853B2 patent drawing

AI summary

An amplifying apparatus including an amplifier having a first FET, a second FET having a source connected to a drain of the first FET, a load resistance connected to a drain of the second FET, a first bias circuit configured to supply a first bias voltage to a gate of the first FET, and a second bias circuit configured to supply a second bias voltage to a gate of the second FET. The second bias circuit includes a second comparison circuit configured to send a control signal to the gate of the second FET so that a bias voltage of a connection node between the first and second FETs changes in conjunction with an output voltage of the first bias circuit.