Low Impedance Polarity Conversion Circuit Using FET Bridge
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Solution Overview
Problem
Four-diode rectifier bridges in power source polarity converters result in less than ideal efficiency due to forward voltage drop, which complicates the conversion of AC to DC voltage and DC polarity translation.
Innovation Solution
A low impedance polarity conversion circuit utilizing a Field-Effect Transistor (FET) bridge with cooperating pairs of FETs, where the activation of specific pairs of FETs and application of boosted voltage signals reduce impedance, ensuring output DC signals have the same polarity regardless of input polarity, and a charge conditioning circuit to generate enhanced DC signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a four-diode rectifier bridge is used for polarity conversion, then polarity conversion function is achieved, but forward voltage drop increases causing efficiency loss
Solution Approach 1:
The patent changes the fundamental parameter of the rectification component from diodes to FETs (Field-Effect Transistors). FETs have much lower on-resistance compared to diode forward voltage drop, thereby reducing power loss while maintaining the polarity conversion function. The control signals adjust FET gate voltages to achieve rectification with minimal voltage drop.
Solution Approach 2:
The patent replaces the passive diode-based rectification mechanism with an active FET-based switching mechanism controlled by control signals. This substitution allows for dynamic control of the rectification process and significantly reduces the voltage drop across the rectifier bridge, improving overall system efficiency.
2Loss of energy
If FET bridge is used to reduce impedance, then power loss is minimized, but circuit complexity increases due to control requirements
Solution Approach 1:
The control circuit performs multiple functions: it generates control signals for both pairs of FETs, detects input polarity, and regulates the rectification process. By consolidating these functions into a single control unit, the patent manages circuit complexity while achieving low impedance and minimal power loss through coordinated FET switching.
3Loss of energy
If boosted voltage signals are applied to FET gates, then FET impedance is reduced, but additional voltage generation circuitry is required
Solution Approach 1:
The patent combines the boosted voltage generation function with the existing control circuit. The control circuit integrates the voltage boosting capability to generate the necessary gate control voltages, eliminating the need for separate voltage generation circuitry and reducing overall system complexity while achieving low FET impedance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly reduces impedance and maintains consistent output polarity, enhancing efficiency and minimizing power loss across the FET bridge, thereby improving power supply applications.
Implementation Method 1
A Field-Effect Transistor (FET) bridge with cooperating pairs of FETs, where the activation of specific pairs of FETs and application of boosted voltage signals reduce impedance
Implementation Method 2
A charge conditioning circuit for generating third and fourth DC signals. The third DC signal has a voltage greater than the first DC signal voltage and the fourth DC signal has a voltage less than the second DC signal voltage
Implementation Method 3
The second pair of DC signals have voltages differing from each other by a second amount that is greater than the first amount. As a result of the second amount being greater than the first amount, impedances of the two activated FETs are lower
Data Source
AI summary
A low impedance polarity conversion circuit for driving a load with a DC power source is disclosed. The DC power source has a first pole from which a first DC signal originates and a second pole from which a second DC signal originates. The first DC signal has a voltage greater than a voltage of the second DC signal. The conversion circuit includes a circuit output node through which an output DC signal is delivered from the conversion circuit to the load. The conversion circuit also includes a charge conditioning circuit for generating third and fourth DC signals. The third DC signal has a voltage greater than the first DC signal voltage and the fourth DC signal has a voltage less than the second DC signal voltage. A rectification circuit includes first and second inputs for attachment to the first pole and the second pole. A Field-Effect Transistor (FET) bridge is electrically connected to the first and second inputs. The FET bridge includes first and second pairs of cooperating FETs. The third voltage controls a first of the first pair of FETs and a first of the second pair of FETs. The fourth voltage controls a second of the first pair of FETs and a second of the second pair of FETs. The FET bridge is for rectifying the first and second DC signals in order that the output DC signal is the same polarity irrespective of whether the first input is attached to the first pole or the second pole.


