Current-Sense Ratio Calibration in Power FET ICs

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Solution Overview

Problem

In power control systems where power amplifier elements and control circuitry are fabricated separately, such as with NexFETs and other ICs, calibrating the current-sense ratio for error sources like circuit mismatch and process variations becomes challenging, especially when they are not co-packaged, and adding a sense resistor is undesirable due to cost and power consumption.

Innovation Solution

A standalone power MOSFET IC with a sense transistor and a controller IC that includes calibration circuitry to apply proportioned stimuli to the power and sense paths, allowing for calibration of the current-sense ratio without a sense resistor in the power path, using a white noise bitstream generator to decorrelate the stimulus from system tones.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If separate fabrication processes are used for power amplifier elements and control circuitry, then manufacturing cost and flexibility are improved, but calibration accuracy of current-sense ratio deteriorates

Engineering Contradiction:
Improvemanufacturing costVSAvoidcurrent-sense ratio calibration accuracy
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent uses a sense FET that is a scaled-down copy of the regulator FET geometry. By fabricating both FETs using the same process and maintaining geometric similarity, the current-sense ratio is determined by the ratio of their active areas rather than requiring precise post-fabrication calibration. This copying approach allows separate fabrication while maintaining calibration accuracy.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent changes the geometric parameters of the sense FET relative to the regulator FET to establish the current-sense ratio. By scaling the width and length parameters of the sense FET proportionally, the desired current ratio is achieved through parameter design rather than post-fabrication adjustment, resolving the contradiction between separate manufacturing and calibration accuracy.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If sense resistors are added to calibrate current-sense ratio, then measurement precision is improved, but power consumption and impedance increase

Engineering Contradiction:
Improvecurrent-sense ratio accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent extracts the calibration function from external sense resistors and implements it directly within the FET geometry. By taking out the need for additional sense resistors and embedding the ratio determination in the FET structure itself, the system achieves accurate current sensing without adding power-consuming resistive elements to the power path.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical/resistive calibration approach (using sense resistors) with a field-effect approach (using FET geometry ratios). This substitution eliminates the need for power-dissipating sense resistors while maintaining calibration accuracy through the inherent electrical properties of the FETs.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If sense resistors are added to calibrate current-sense ratio, then measurement precision is improved, but power path impedance increases

Engineering Contradiction:
Improvecurrent-sense ratio accuracyVSAvoidpower path impedance
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent removes sense resistors from the power path entirely, extracting the calibration function and embedding it in the FET geometry. This taking out approach maintains measurement precision while eliminating the impedance contribution that would result from adding sense resistors to the power path.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10698008B2Current-sense ratio calibration
Publication Date: 2020.06.30 TEXAS INSTRUMENTS INC
  • US10698008B2 patent drawing
  • US10698008B2 patent drawing

AI summary

A current-sense ratio calibration system includes a power field effect transistor (FET) integrated circuit (IC) that includes a regulator FET to regulate current through a power path and a sense FET to provide a sense current to a sense path. The regulator FET and sense FET have an intended current-sense ratio. The system calibrates the current-sense ratio by applying proportioned stimulus signals to the power and sense paths, the proportion being the intended current-sense ratio. The calibration circuitry compares a measurement of a sense path circuit parameter made during the stimulus application to a measurement of the parameter made not during the stimulus application to derive an error term used to calibrate for any sources of error in the current-sense ratio.