FET-Based Double Balanced Mixer for Stable Conversion Gain

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Solution Overview

Problem

Conventional diode double balanced mixers experience rapid decrease in conversion gain with decreasing LO power and slow increase in third-order input-referenced intercept point (IIP3) versus LO power, limiting their linearity and bandwidth.

Innovation Solution

A field effect transistor (FET) based double balanced mixer is developed, utilizing a four-node FET ring with drain-gate connected FETs and quarter-wave isolation elements, which provides improved linearity and wide bandwidth by reducing conversion gain variation versus LO power and enhancing IIP3 values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional diode double balanced mixer is used, then the mixer can perform frequency conversion, but the conversion gain rapidly decreases as LO power decreases due to diode turn-on voltage

Engineering Contradiction:
Improveconversion gainVSAvoidLO power range
Core Design Contradiction:
PowerVSAdaptability or versatility

Solution Approach 1:

The patent changes the fundamental operating parameter of the mixing element from diode (with fixed turn-on voltage) to FET (with variable threshold voltage and transconductance characteristics). This parameter change enables the mixer to maintain stable conversion gain across a wider range of LO power levels, as the FET's operation is not limited by a sharp turn-on threshold like the diode.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the diode-based mixing mechanism with a FET-based mixing mechanism. The FET provides different electrical characteristics, particularly in how it controls current flow and responds to LO drive signals, eliminating the rapid conversion gain degradation observed in diode mixers at low LO power.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If conventional diode double balanced mixer is used, then the mixer structure is simple, but the third-order input-referenced intercept point (IIP3) increases slowly versus LO power, limiting linearity

Engineering Contradiction:
ImprovelinearityVSAvoidmixer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the active device parameter from diode to FET, which fundamentally alters the mixing nonlinearity characteristics. The FET's transconductance behavior provides superior third-order intercept point performance that increases more rapidly with LO power compared to diode implementations, thereby improving linearity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure combining FETs with balun transformers and DC-blocking capacitors to achieve both improved linearity and proper signal isolation. This composite approach allows the FET to provide the nonlinear mixing function while the surrounding components manage impedance matching and signal separation.

Inventive Principle:
Principle #40Composite materials

3Speed

If conventional diode double balanced mixer is used, then the circuit is compact, but the bandwidth is limited due to parasitic characteristics

Engineering Contradiction:
ImprovebandwidthVSAvoidparasitic characteristics
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent substitutes diode-based switching with FET-based switching, which exhibits different parasitic characteristics. The FET's gate capacitance and transconductance characteristics enable wider bandwidth operation compared to the junction capacitance and resistance limitations of diode-based mixers.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10141888B2Double balanced mixer
Publication Date: 2018.11.27 PSEMI CORP
  • US10141888B2 patent drawing
  • US10141888B2 patent drawing
  • US10141888B2 patent drawing

AI summary

A FET based double balanced mixer (DBM) that exhibits good conversion gain and IIP3 values and provides improved linearity and wide bandwidth. In one embodiment, a first balun is configured to receive a local oscillator (LO) signal and generate two balanced LO signals that are coupled to two corresponding opposing nodes of a four-node FET ring. A second balun is configured to pass an RF signal on the unbalanced side. The FET ring includes at least four FETs connected as branches of a ring, with the source of each FET connected to the drain of a next FET in the ring. Each FET is preferably fabricated as, or configured as, a low threshold voltage device having its gate connected to its drain, which causes the FET to operate as a diode, but with the unique characteristic of having close to a zero turn-on voltage.