FET Bus-to-Ground Protection Circuit for High-Surge ESD Clamping
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Solution Overview
Problem
Existing electrostatic discharge (ESD) and electrical overstress (EOS) protection circuits, such as TVS diodes, become impractically large for high voltage and high transient current surge applications due to their need to absorb significant energy, making them unsuitable for applications like industrial sensors and automotive systems.
Innovation Solution
The use of a Field Effect Transistor (FET) based protection circuit that routes electrical current surges to ground, with a triggering circuit controlling the FET to divert excess energy away from the load, thereby reducing the size and energy absorption requirements of the protection device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a TVS diode is used to protect semiconductor devices from ESD and EOS events, then the protection capability is improved, but the device size becomes impractically large for high voltage and high current applications
Solution Approach 1:
The protection function is segmented between two components: a compact TVS diode for voltage detection and triggering, and a FET device for the actual current suppression. This division allows the TVS diode to be small while the FET handles the high current, resolving the size-capability contradiction
Solution Approach 2:
The TVS diode acts as an intermediary triggering device that detects voltage surges and activates the FET. This intermediary approach allows a small sensing component to control a larger current-handling component, achieving high protection capability without requiring a large TVS diode
2Loss of energy
If a TVS diode absorbs large transient energy, then the protection effectiveness is improved, but the device complexity and size increase
Solution Approach 1:
The energy absorption function is extracted from the TVS diode and transferred to the FET device. The TVS diode is reduced to a simple triggering sensor, while the FET handles the bulk of energy dissipation. This extraction simplifies the overall device structure while maintaining energy absorption capability
Solution Approach 2:
The TVS diode copies only the voltage detection function rather than performing full energy absorption. This functional copying allows the system to use a small sensing element to control a larger power-handling element, reducing overall complexity
3Reliability
If the FET is triggered to conduct during ESD events, then the current suppression is improved, but there is a risk of latch-up condition
Solution Approach 1:
The circuit uses feedback through the TVS diode to monitor the voltage across the FET. When the FET conducts and voltage drops, the TVS diode stops triggering, automatically turning off the FET. This feedback mechanism ensures current suppression while preventing latch-up by dynamically adjusting FET conduction based on real-time voltage conditions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The FET based protection circuit effectively suppresses electrical overstress without latching up, offering deep snapback and low on-state voltage, thus dissipating more power for a given die size, and is capable of handling high peak pulse currents with reduced clamping voltage, making it suitable for high voltage and high current applications.
Implementation Method 1
a protection circuit that routes electrical current surges to ground through a transistor
Implementation Method 2
a triggering circuit controlling the FET to divert excess energy away from the load
Data Source
Figure 1
Figure 2a~2b
Figure 3a~3b
AI summary
A semiconductor device includes a voltage input circuit node and a ground node. A first transistor is coupled between the voltage input circuit node and the ground node. A triggering circuit is coupled between the voltage input circuit node and the ground node in parallel with the first transistor. The triggering circuit includes a trigger diode. An output of the triggering circuit is coupled to a control terminal of the first transistor. A load is powered by coupling the load between the voltage input circuit node and the ground node.