Compound Semiconductor FET Field Plate Layout for High-Frequency Gain
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Solution Overview
Problem
The use of a field plate in semiconductor devices leads to increased capacitance between the source and drain, which deteriorates high-frequency characteristics.
Innovation Solution
The semiconductor device incorporates a substrate with a compound semiconductor layer and multiple unit FETs, where the field plate electrode is strategically positioned between the gate and drain electrodes with varying distances and lengths to optimize high-frequency performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a field plate electrode is provided between the gate electrode and drain electrode, then current collapse is suppressed and device reliability is improved, but capacitance between source and drain increases which deteriorates high-frequency characteristics
Solution Approach 1:
The field plate electrode is designed with non-uniform dimensions where the first length (in first direction) and first distance (in second direction) vary across different unit FETs. Specifically, unit FETs closer to the center have smaller field plate dimensions while those at the ends have larger dimensions. This local variation optimizes the balance between current collapse suppression and high-frequency performance for each region of the device.
Solution Approach 2:
The invention changes the geometric parameters of the field plate electrode by setting different first lengths and first distances for different unit FETs. The patent specifies that the first length and first distance satisfy certain relationships (e.g., the sum of first lengths of outer unit FETs exceeds that of inner unit FETs, and similarly for first distances), creating a parameter gradient that resolves the contradiction between reliability and high-frequency characteristics.
2Reliability
If the field plate electrode is extended further between gate and drain, then electric field control is improved, but the capacitance effect worsens high-frequency performance
Solution Approach 1:
Different unit FETs have different field plate extensions tailored to their local requirements. Unit FETs at the ends of the array have larger field plate extensions (greater first length and first distance) for enhanced electric field control, while central unit FETs have smaller extensions to minimize capacitance effects. This localized optimization resolves the contradiction between electric field control and high-frequency performance.
Solution Approach 2:
The field plate electrode structure is segmented into multiple unit FET-specific sections, each with independently optimized dimensions. The first length and first distance parameters are segmented across the array of unit FETs, allowing each segment to be optimized for its specific position and function, thereby balancing electric field control with high-frequency characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the deterioration of high-frequency characteristics by managing the electric field and capacitance, while maintaining the benefits of field plate usage in reducing current collapse.
Implementation Method 1
a field plate electrode provided between the gate electrode and the drain electrode and above the compound semiconductor layer with an insulating film interposed between the compound semiconductor layer and the field plate electrode
Data Source
AI summary
A semiconductor device includes a substrate, a compound semiconductor layer provided on the substrate, and a plurality of unit FETs arranged in a second direction intersecting a first direction, each of the unit FETs including a source electrode, a drain electrode, a gate electrode interposed between the source electrode and the drain electrode, and a field plate electrode. The plurality of unit FETs include a first unit FET, and a second unit FET close to an end of the plurality of unit FETs in the second direction. A first distance in the second direction between an end of the gate electrode closer to the drain electrode and an end of the field plate electrode closer to the drain electrode in the first unit FET is shorter than a second distance in the second direction therebetween in the second unit FET.