Gate Resistor Bypass Circuit for Faster FET Switching
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Solution Overview
Problem
Integrated circuit devices with larger gate resistors suffer from slow switching times due to the charging of gate-source capacitance through series resistance, which hinders fast switching speed while maintaining RF performance and die area efficiency.
Innovation Solution
A switching circuit design that includes a main FET switch and a bypass switch configured to short the gate resistor during transitions, allowing the bypass switch to close and open at specific states to bypass the gate resistor, thereby reducing switching time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If larger gate resistors are used in FET switches, then linearity and insertion loss are improved, but switching time increases
Solution Approach 1:
The gate resistor is segmented into two functional parts: a main gate resistor (Rg1) that provides the necessary linearity and insertion loss characteristics, and a bypass switch (S1) that can short this resistor during switching transitions. This segmentation allows each part to optimize for its specific function without compromising the other.
Solution Approach 2:
The bypass switch introduces dynamic behavior to the gate resistor configuration. During normal operation, the full gate resistor value is present to maintain linearity. During switching transitions, the bypass switch dynamically shorts the resistor to enable fast charging/discharging of gate capacitance, then opens again to restore the linearity benefit.
2Strength
If larger gate resistors are used in FET switches, then voltage swing handling is improved, but switching speed decreases
Solution Approach 1:
The gate resistor is segmented into two functional parts: a main gate resistor (Rg1) that provides the necessary linearity and insertion loss characteristics, and a bypass switch (S1) that can short this resistor during switching transitions. This segmentation allows each part to optimize for its specific function without compromising the other.
Solution Approach 2:
The bypass switch introduces dynamic behavior to the gate resistor configuration. During normal operation, the full gate resistor value is present to maintain linearity. During switching transitions, the bypass switch dynamically shorts the resistor to enable fast charging/discharging of gate capacitance, then opens again to restore the linearity benefit.
3Reliability
If larger gate resistors are used in FET switches, then RF performance at lower frequencies is maintained, but die area increases
Solution Approach 1:
The gate resistor is segmented into two functional parts: a main gate resistor (Rg1) that provides the necessary linearity and insertion loss characteristics, and a bypass switch (S1) that can short this resistor during switching transitions. This segmentation allows each part to optimize for its specific function without compromising the other.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables faster switching times by decoupling gate resistance from switching speed requirements, allowing the gate resistor to be designed for performance while maintaining fast transitions.
Implementation Method 1
a bypass switch configured to short the gate resistor during transitions
Implementation Method 2
the gate source equivalent capacitance, Cgs, is being charged by a current flowing through a series resistance Rg
Data Source
AI summary
Implementing a series gate resistor in a switching circuit results in several performance improvements. Few examples are better insertion loss, lower breakdown voltage requirements and a lower frequency corner. These benefits come at the expense of a slower switching time. Methods and devices offering solutions to this problem are described. Using a concept of bypassing the series gate resistor during transition time, a fast switching time can be achieved while the above-mentioned performance improvements are maintained.


