Gate Current Shunting in FET Assemblies During Pre-Power Startup
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In electrical circuits with multiple power supplies, the disparity in power supply operating states during start-up can lead to uncontrolled operation of FETs, causing improper circuit operation, damage, and safety concerns due to uncontrolled current flow during the pre-power state, especially when the gate-to-source threshold voltage is low.
Innovation Solution
The introduction of transistor assemblies with gate current shunting capability, which include a capacitor and a switching device configured to shunt current away from the gate of a FET during the pre-power state, preventing the FET from entering an on-state and ensuring controlled operation when the second power supply is inactive.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FETs are used with high gate impedance and voltage control, then the device can be efficiently controlled, but during pre-power state with varying power supply voltage slopes, uncontrolled current flow occurs causing latch-up and damage
Solution Approach 1:
A current shunting circuit comprising a shunting transistor and capacitor is introduced as an intermediary protective layer between the power supply and the FET gate. This mediator detects pre-power state conditions and actively shunts away harmful current flows that would otherwise reach the FET gate, preventing latch-up while not interfering with normal FET operation during powered state
Solution Approach 2:
The protective circuit performs preliminary detection of pre-power state conditions before they can cause damage. By monitoring the voltage slope and state of power supplies in advance, the circuit proactively activates the shunting mechanism to counteract potential harmful effects before they manifest as latch-up or damage to the FET
2Ease of operation
If the gate-to-source threshold voltage is low to enable easier switching, then the FET can be more easily controlled, but the risk of uncontrolled operation during pre-power state increases
Solution Approach 1:
The shunting circuit acts as an intermediary gatekeeper that decouples the threshold voltage requirement from the protection mechanism. It allows the FET to maintain low threshold voltage for ease of control while the intermediary protective layer filters out harmful current paths during pre-power state, effectively separating the switching function from the protection function
3Reliability
If transistor assemblies include gate current shunting capability with capacitor and switching device, then uncontrolled current flow is prevented, but the device complexity increases
Solution Approach 1:
The shunting transistor and capacitor are designed to serve multiple functions: detecting pre-power state conditions, shunting harmful currents, and automatically deactivating when normal operation begins. This multi-functionality reduces the need for separate protective components and control logic, thereby minimizing the increase in device complexity while achieving comprehensive protection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively minimizes the risk of uncontrolled current flow and maintains proper circuit operation by shunting current away from the gate of FETs during the pre-power state, even with varying power supply voltage slopes, thus preventing latch-up and damage.
Implementation Method 1
charging a gate-to-source capacitance of a second N-channel field effect transistor (FET) via a capacitor
Implementation Method 2
shunting current away from a gate of a first N-channel field effect transistor (FET) via the second N-channel FET
Data Source
AI summary
A transistor assembly with gate current shunting capability includes first field effect transistor (FET), a first pull-up current source, a first pull-down current source, a first switching device, a control circuit, a capacitor, and a second FET. The first FET is an N-channel FET including a first gate, a first drain, and a first source. The first drain is electrically coupled to a first power supply. Each of the pull-up current source and the pull-down current source is electrically coupled to the first gate. The first switching device is electrically coupled in series with the first pull-down current source and is controlled by a first control signal. The control circuit is at least partially powered by a second power supply and generates the first control signal.The capacitor and the second FET collectively shunt current away from the first gate during a pre-power operating state of the transistor assembly.