GaN FET Temperature Sensing via Gate Resistance
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Solution Overview
Problem
High-power semiconductor transistors, particularly those made from gallium-nitride, face premature degradation and failure due to excessive heat buildup during high-power applications, as existing temperature monitoring methods are inadequate for accurately sensing and controlling temperature within these devices.
Innovation Solution
Incorporating thermally-sensitive structures, such as a floating gate plate or source field plate, into field-effect transistors (FETs) that utilize metal resistance thermometry to monitor temperature changes by applying a probe current and sensing voltage variations, allowing for real-time temperature sensing and feedback-controlled power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high-power applications are used in GaN transistors, then power output and performance are improved, but temperature increases causing premature degradation and failure
Solution Approach 1:
The patent applies preliminary action by incorporating a temperature sensing structure (floating gate plate or source field plate) into the transistor before operation. This structure is pre-configured with probe current paths and voltage sensing contacts, enabling temperature monitoring to begin immediately when the transistor is activated, allowing preventive temperature management before degradation occurs
Solution Approach 2:
The patent implements feedback by continuously monitoring the voltage developed across the thermally-sensitive structure and using this information to sense temperature changes in real-time. This feedback mechanism enables dynamic adjustment of operating conditions based on actual temperature, preventing excessive heat buildup while maintaining high power output capability
2Measurement precision
If temperature monitoring is implemented using existing methods, then temperature sensing capability is provided, but the methods are inadequate for accurately sensing and controlling temperature within high-power transistors
Solution Approach 1:
The patent merges the temperature sensing function with existing transistor structures by utilizing the floating gate plate or source field plate as the thermally-sensitive element. This integration combines the sensing function with structures already present in high-power transistors, eliminating the need for separate external sensing components and enabling accurate temperature measurement that directly reflects the transistor's internal thermal state
Solution Approach 2:
The patent replaces inadequate existing temperature monitoring methods with an electrical resistance-based sensing system. By measuring voltage developed from probe current flow through the thermally-sensitive structure, the system substitutes direct electrical measurement for insufficient mechanical or external thermal sensing methods, achieving superior temperature detection accuracy and reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables precise monitoring of transistor temperatures, preventing overheating and extending the mean time to failure (MTTF) by allowing for active control of power levels based on sensed temperature, thereby enhancing the reliability and longevity of high-power semiconductor devices.
Implementation Method 1
thermally-sensitive structures may be formed in a transistor and used to evaluate an operating temperature of the transistor by sensing changes in resistance of the thermally-sensitive structure, e.g., using metal resistance thermometry (MRT)
Implementation Method 2
A voltage may develop across the region(s) due to the applied current. The voltage may be monitored to sense temperature changes in a region of the FET that is adjacent to the thermally-sensitive structure(s)
Data Source
AI summary
Thermally-sensitive structures and methods for sensing the temperature in a region of a FET during device operation are described. The region may be at or near a region of highest temperature achieved in the FET. Metal resistance thermometry (MRT) can be implemented with gate or source structures to evaluate the temperature of the FET.