FET-Integrated Photonic Waveguides for High Modulation Depth

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Solution Overview

Problem

Conventional silicon photonic devices face challenges in achieving high modulation depth with precise tuning and detection, leading to increased device size and reduced speed, while memristors risk thermal breakdown due to excessive current flow beyond current limits.

Innovation Solution

Integration of a MOSFET with a waveguide structure, utilizing a MOSFET to increase modulation depth and a memristive structure connected in series to limit current flow, enhancing modulation efficiency and preventing thermal breakdown.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional silicon photonic devices are used to achieve high modulation depth, then modulation depth is improved, but device size increases and speed decreases

Engineering Contradiction:
Improvemodulation depthVSAvoiddevice speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent merges the MOSFET structure with the waveguide by integrating the waveguide within the MOSFET gate region, allowing carrier accumulation to occur directly at the waveguide location. This integration eliminates the need for separate carrier injection regions and reduces the overall device footprint, thereby maintaining high modulation depth while improving device speed.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from planar carrier accumulation structures to a three-dimensional configuration where the waveguide is positioned within the vertical profile of the MOSFET gate. This dimensional change allows for more efficient carrier confinement and faster modulation response, resolving the contradiction between modulation depth and device speed.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If larger regions are used to alter carrier concentration for high modulation depth, then modulation depth is improved, but device size increases

Engineering Contradiction:
Improvemodulation depthVSAvoiddevice footprint
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent applies local quality by concentrating carrier accumulation specifically at the waveguide location through the MOSFET gate structure. Instead of requiring large regions for carrier injection, the electric field is locally confined to the waveguide area, achieving high modulation depth with minimal device footprint.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The waveguide is nested within the MOSFET gate structure, with the gate region encompassing the waveguide. This nesting allows the carrier accumulation region to be contained within the existing MOSFET footprint, eliminating the need for additional space and reducing overall device size while maintaining high modulation depth.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Measurement precision

If higher voltage biases are applied to memristors to transition between states, then modulation depth is improved, but current flow exceeds current limit causing thermal breakdown

Engineering Contradiction:
Improvemodulation depthVSAvoidthermal breakdown
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent incorporates a feedback mechanism where the MOSFET drain current automatically limits the current flowing through the memristor. When the memristor is in the low-resistance state, the MOSFET reduces its drain current to prevent exceeding the current limit, thereby preventing thermal breakdown while maintaining sufficient voltage for modulation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The MOSFET structure provides beforehand cushioning by pre-establishing a current limit mechanism that prevents excessive current flow before thermal breakdown can occur. The saturation region operation of the MOSFET ensures that current remains controlled even when high voltage biases are applied to the memristor.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides improved modulation depth and reduced device size, while maintaining high speed and preventing thermal breakdown, enabling efficient optical signal processing and non-volatile memory integration.

Implementation Method 1

One example method for altering the refractive index is through electro-optic effects, such as the plasma dispersion effect, which varies free-carrier concentration within the silicon waveguide.

Methodology Applied
Scientific EffectPlasma dispersion effect: Electro-Optic Effects

Implementation Method 2

Another example approach is metal-oxide-semiconductor (MOS) capacitor-based modulators that can produce carrier accumulation within a waveguide.

Methodology Applied
Scientific EffectElectrostatic field effect: Electric Field

Data Source

PatentUS20250271725A1Photonic devices having a field-effect transistor (FET)
Publication Date: 2025.08.28 HEWLETT PACKARD ENTERPRISE DEV LP
  • US20250271725A1 patent drawing
  • US20250271725A1 patent drawing
  • US20250271725A1 patent drawing

AI summary

Systems and methods are provided for optical devices having a field-effect transistor (FET) for optical tuning. Examples include a device layer formed on a substrate and comprising a first material, and a FET formed on the substrate. The MOSFET comprises a drain formed in the device layer comprising a first doped region, a source formed in the device layer comprising a second doped region, a gate comprising a second material formed on the device layer, and a conductive channel formed in the device layer based on a voltage bias applied to the gate. An optical waveguide is formed between the gate and the conductive channel.