FET Junction Temperature and Current Sensing via Control IC
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for measuring current and temperature in standard field-effect transistors (FETs) lack accuracy for automotive safety applications, especially when multiple FETs are thermally coupled, and require additional sensing elements, increasing cost.
Innovation Solution
A control IC-based measurement circuit that calculates junction temperature (Tj) and drain-source current (Ids) for one or more standard FETs without additional sensing elements by sampling drain-source voltage (Vds) and using stored thermal resistance and on-resistance values, allowing for high accuracy and protection against over-current and over-temperature conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If additional current sensing elements are used to measure Ids accurately, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The FET's own drain-source voltage measurement capability is utilized to determine current through its on-resistance characteristic. The control IC measures Vds and uses the known Rds(Tj) relationship to calculate Ids, allowing the FET to serve its own sensing function without external sensing elements.
Solution Approach 2:
The solution exploits the temperature-dependent variation of Rds to enable current measurement. By measuring Vds and using the pre-stored Rds(Tj) characteristic curve, the system calculates Ids = Vds/Rds(Tj), transforming the FET's parasitic resistance into a useful sensing parameter.
2Device complexity
If Rds is assumed constant for current measurement, then device complexity is reduced, but measurement precision deteriorates due to temperature variation
Solution Approach 1:
The Rds(Tj) characteristic data is pre-calculated and stored in lookup tables within the control IC during manufacturing. This preliminary preparation allows the system to quickly retrieve the correct Rds value based on measured or estimated Tj, enabling accurate current calculation without real-time iteration.
Solution Approach 2:
The system uses an iterative approach where initial Tj estimation based on ambient temperature and power dissipation feeds into Rds selection, which then refines Ids calculation, which in turn updates power dissipation and Tj estimation. This feedback loop converges to accurate values for all parameters.
3Productivity
If multiple FETs are placed in a common package to save space, then productivity is improved, but measurement precision deteriorates due to thermal coupling
Solution Approach 1:
The control IC independently measures Vds for each FET and separately determines Tj and Ids for each device using its own Rds(Tj) characteristic. This segmentation allows each FET to be treated as an independent sensing unit even within a thermally coupled package, maintaining measurement accuracy.
Solution Approach 2:
The system dynamically adjusts the Rds value for each FET based on its individual operating conditions and temperature. By continuously updating Tj estimates and selecting appropriate Rds(Tj) values from stored data, the system adapts to thermal coupling effects and maintains accurate measurements for each FET.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate determination of Ids and Tj for standard FETs, ensuring reliable protection against over-stress conditions without the need for external sensing elements, improving safety and reducing costs.
Implementation Method 1
the application of Ids which flows through Rds will cause a power (Ids2*Rds(Tj)) to be dissipated by the FET. The heat generated by this power will primarily flow through a thermal resistance between the FET junction and case
Implementation Method 2
The heat generated by this power will primarily flow through a thermal resistance between the FET junction and case (Rth,jc) and subsequently through a thermal resistance between the FET case and ambient (Rth,ca)
Data Source
AI summary
An apparatus and method of determining the junction temperature (Tj) and drain-source current (Ids) of a standard FET within a multi-FET module includes a control IC managing one or more 3 terminal standard FETs within the same package, calculating Tj and Tds for one or more FETs in one or more packages, and protecting each FET against short circuit faults while allowing high current transients, such as inrush currents from a lamp load.


