FET IV Characteristic Measurement Using Pulse Voltage and Impedance Correction
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Solution Overview
Problem
Conventional FET characteristic measurement methods fail to provide accurate IV characteristics for SOI MOSFETs, strained-silicon MOSFETs, and MOSFETs with high-k gate insulators due to self-heating and electron trapping, leading to inaccurate drain current measurements.
Innovation Solution
A method involving a pulse generator to apply a pulse voltage to the FET gate, with a bias voltage from a bias tee applied to the FET drain, using a voltage measuring unit to convert drain current into voltage, and determining a coefficient based on S parameters and input impedance to calculate the actual drain bias voltage, thereby correcting for voltage drops and ensuring accurate measurements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a DC voltage is applied to the gate of the FET to measure IV characteristics, then the measurement can be performed using conventional methods, but self-heating occurs in SOI MOSFETs and strained-silicon MOSFETs leading to unreliable measurement results
Solution Approach 1:
The patent applies periodic pulse voltage instead of continuous DC voltage to the gate of the FET. This periodic action allows the measurement to be performed while avoiding continuous power dissipation that causes self-heating in SOI and strained-silicon MOSFETs, thereby improving measurement reliability without significantly complicating the measurement approach
Solution Approach 2:
The patent uses short-duration pulse measurements to quickly capture the IV characteristics before self-heating can occur. By rushing through the measurement in brief pulses rather than continuous DC, the method obtains reliable data from temperature-sensitive devices without allowing thermal effects to degrade the results
2Ease of manufacture
If a DC voltage is applied to the gate to measure IV characteristics, then conventional measurement procedures can be used, but electrons are trapped in defects in high-k insulator films reducing the drain current driving force
Solution Approach 1:
The patent employs periodic pulse voltage applied to the gate rather than continuous DC voltage. This periodic action prevents electrons from being trapped in defects of high-k insulator films, as the brief pulse duration does not allow sufficient time for electron trapping to occur, thereby maintaining accurate drain current measurements while keeping the procedure relatively simple
Solution Approach 2:
The measurement is performed using short pulses that rush through the measurement process before electron trapping can significantly reduce the drain current. This approach captures the true IV characteristics of high-k MOSFETs without the degradation caused by electron trapping in insulator defects
3Device complexity
If the input impedance of the measuring apparatus is used to convert drain current to voltage, then the measurement system can be simplified, but voltage drop occurs due to the input impedance causing inaccurate bias voltage measurement
Solution Approach 1:
The patent introduces feedback by measuring the actual voltage at the drain terminal using a high-impedance voltmeter and comparing it with the intended bias voltage. This feedback mechanism allows the system to detect and compensate for voltage drops caused by the input impedance of the measuring apparatus, thereby improving bias voltage measurement accuracy without significantly increasing system complexity
Solution Approach 2:
The patent uses a high-impedance voltmeter as an intermediary to measure the actual drain voltage without significantly loading the circuit. This intermediary measurement device allows accurate detection of voltage drops caused by the input impedance, enabling correction of the bias voltage value while maintaining relatively simple measurement system architecture
Data Source
AI summary
A coefficient indicating the relationship between a measurement voltage of voltage measuring unit and a voltage drop in a drain bias voltage due to drain current is determined based on at least an S parameter of a measuring system and an input impedance of the measuring unit. A voltage drop at the drain is determined from the coefficient. Based on the determined voltage drop, a drain bias voltage actually applied to the drain of an FET is determined. Also, a coefficient for converting the measurement voltage of the measuring unit into a drain current is determined based on at least an S parameter of a measuring system and the input impedance of the voltage measuring unit and an electrical length of the measuring system if necessary. Based on the determined coefficient, a drain current actually flowing in the FET is determined.