FET With Stressor for 2D Material Electrode Bonding Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor processes advance, the reduction in transistor size leads to issues such as threshold voltage variation, carrier velocity saturation, and deterioration of subthreshold characteristics due to the short channel effect, which affects the performance and power efficiency of transistors.
Innovation Solution
A field effect transistor design that applies tensile strain to a two-dimensional (2D) material electrode bonding layer using a stressor, increasing its conductivity while maintaining the channel without strain, thereby improving carrier mobility and reducing off-current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transistor size is reduced to increase the degree of integration, then the space occupied by the transistor is reduced, but the corresponding area between the gate electrode and the channel is reduced causing short channel effects
Solution Approach 1:
The patent applies tensile strain locally to the 2D material electrode bonding layer at the source and drain regions, while keeping the channel region strain-free. This localized strain application improves carrier mobility in the contact regions without inducing short channel effects in the channel, thus resolving the contradiction between miniaturization and performance reliability.
2Length of moving object
If the corresponding area between the gate electrode and the channel is reduced due to transistor size reduction, then the transistor size is reduced, but the power efficiency deteriorates
Solution Approach 1:
The patent changes the physical state of the 2D material electrode bonding layer by applying tensile strain, which modifies the carrier mobility and electrical conductivity parameters. This parameter change compensates for the reduced gate-channel area, maintaining power efficiency despite transistor size reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The application of tensile strain to the 2D material electrode bonding layer enhances conductivity and carrier mobility, improving the transistor's performance and power efficiency without increasing off-current, making it suitable for high-density integrated circuits.
Implementation Method 1
a tensile strain is applied to a two-dimensional (2D) material electrode bonding layer to increase the conductivity thereof
Data Source
Figure 1
Figure 2
Figure 3
AI summary
Provided are a field effect transistor, an electronic apparatus including the same, and a method of manufacturing the field effect transistor. The field effect transistor may include a substrate; a gate electrode on the substrate; an insulating layer on the gate electrode; a source electrode on the insulating layer; a drain electrode apart from the source electrode; a channel between the source electrode and the drain electrode and including a two-dimensional (2D) material; a 2D material electrode bonding layer adjacent to the source electrode and the drain electrode; and a stressor adjacent to the 2D material electrode bonding layer. The stressor may be configured to apply a tensile strain to the 2D material electrode bonding layer.