High-Frequency FET Switch Biasing for Low Signal Distortion
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Solution Overview
Problem
High-frequency switch circuits using FETs suffer from signal distortion due to varying on-state resistance and off-state capacitance with input voltage, leading to unstable potential differences between drain and source terminals.
Innovation Solution
A high-frequency switch circuit design incorporating a switch section with FETs and bias circuits that apply bias voltages lower than the control signal, generating these voltages from the control signal to stabilize the potential difference between the drain and source terminals, thereby reducing distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If FETs are used in a high-frequency switch circuit, then the circuit can effectively pass or cut off high-frequency signals, but the on-state resistance and off-state capacitance vary with input voltage causing signal distortion
Solution Approach 1:
The patent applies bias voltages to the drain and source terminals of FETs to change the operating parameters of the transistors. By adjusting the bias voltage levels, the on-state resistance and off-state capacitance are stabilized, reducing their variation with input voltage and thereby minimizing signal distortion while maintaining effective signal switching capability.
2Manufacturing precision
If bias voltage is applied to stabilize potential between drain and source terminals, then signal distortion is reduced, but circuit complexity increases due to additional bias circuits
Solution Approach 1:
The bias circuits are designed to serve multiple functions: they provide the necessary bias voltages to stabilize FET operating parameters, and they are integrated into the existing circuit structure. The same bias voltage lines are used across multiple FETs, and the bias generation mechanism leverages existing control signals, thereby reducing the overall circuit complexity while achieving distortion reduction.
3Productivity
If multiple FETs are connected in series to improve switching performance, then signal passing and cutting capability is enhanced, but potential instability between drain and source terminals increases
Solution Approach 1:
When multiple FETs are connected in series, bias voltages are applied to each FET's drain and source terminals to stabilize their individual operating parameters. This stabilization of parameters (on-state resistance and off-state capacitance) for each FET in the series chain prevents potential instability from accumulating, thereby maintaining both improved switching performance and stable potential relationships.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses the variation of on-state resistance and off-state capacitance relative to input voltage variations, significantly reducing harmonic distortion in the high-frequency signal.
Implementation Method 1
a switch section (21) including a field effect transistor (51) which turns on and off in accordance with a control signal (Vc)
Implementation Method 2
a plurality of bias circuits (101 to 105) for applying different bias voltages (Vb1 to Vb4) which are lower than a voltage of the control signal (Vc) so as to generate a potential difference between a drain terminal and a source terminal of the field effect transistor (51)
Data Source
AI summary
A high-frequency switch circuit includes: a switch section comprised of a field effect transistor having a plurality of bias circuits and a potential generating circuit for generating bias voltages from a control signal and supplying them to the bias circuits. The field effect transistor forms the passage route of a high-frequency signal by turning on and off in accordance with the control signal. The bias circuits are provided to produce a potential difference between the drain terminal and the source terminal of the field effect transistor and to apply bias voltages lower than the voltage of the control signal to the drain terminal, and the source terminal.


