Fetch Unit Return Prediction Stack for Subroutine Efficiency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing processor fetch units do not efficiently handle subroutine call and link instructions, leading to inefficiencies in fetching instructions due to the lack of consideration for the relationship between these instructions and corresponding subroutine return instructions.
Innovation Solution
A multi-stage fetch unit is introduced, which includes a return prediction stack to calculate and store predicted target addresses for subroutine return instructions, allowing for efficient fetching by decoding and storing predicted target instruction bundles when certain conditions are met.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a traditional fetch unit is used without considering subroutine call and return relationships, then the device complexity is low, but the productivity (instruction fetching efficiency) deteriorates due to wasted cycles and CTI bubbles
Solution Approach 1:
The fetch unit pre-calculates and stores the target address of the return instruction when a subroutine call instruction is encountered. This preliminary action allows the fetch unit to immediately resume fetching from the correct address after the subroutine executes, eliminating the need to waste cycles decoding the return instruction and preventing CTI bubbles in the instruction stream.
Solution Approach 2:
A return address stack is introduced as an intermediary data structure to store the target address of return instructions. This stack acts as a mediator between the subroutine call instruction and the subsequent return instruction, enabling the fetch unit to efficiently track and resume instruction fetching at the correct location without complex control logic.
2Loss of time
If the fetch unit decodes all instructions fully to identify call and return instructions, then the reliability of instruction identification is high, but the loss of time increases due to unnecessary decoding overhead
Solution Approach 1:
The fetch unit performs partial decoding of instructions to identify only the critical call and return instructions needed for subroutine management. Rather than fully decoding every instruction, the unit applies just enough decoding to recognize these specific instruction types, reducing time overhead while maintaining sufficient reliability for the intended purpose.
Data Source
AI summary
A fetch unit configured to, in response to detecting a subroutine call and link instruction, calculate and store a predicted target address for the corresponding subroutine return instruction in a prediction stack, and if certain conditions are met, also cause to be stored in the prediction stack a predicted target instruction bundle. The fetch unit is also configured to, in response to detecting a subroutine return instruction, use the predicted target address in the prediction stack to determine the address of the next instruction bundle to be fetched, and if certain conditions are met, cause any valid predicted target instruction bundle in the prediction stack to be the next bundle to be decoded.