Error Correction for FFE Burst Errors in High-Speed Links

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Solution Overview

Problem

High-speed link technologies, such as electrical and optical links, suffer from intersymbol interference (ISI) which leads to high bit error rates due to incorrect signal determination by equalizers, especially in decision feedback structures.

Innovation Solution

An error correction method that involves obtaining an output signal and amplitude value from a feed forward equalizer (FFE), performing level decision and decoding to detect burst errors, and correcting them using backtracking and error correction algorithms like maximum likelihood sequence estimation (MLSE) or error control coding (ECC), reducing bit error rates and improving equalization performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a decision feedback structure equalizer is used to equalize signals in high-speed links, then the equalization capability is improved, but the bit error rate increases due to error propagation

Engineering Contradiction:
Improveequalization capabilityVSAvoidbit error rate
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent performs preliminary error detection on the equalized signal before it is used for subsequent processing. By detecting burst errors in advance and correcting them using backtracking algorithms, the system prevents error propagation that would otherwise occur in decision feedback structures, thereby maintaining reliability while preserving equalization capability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a feedback mechanism where the detected and corrected error information is fed back into the signal processing chain. The error correction module uses feedback from error detection to adjust and correct the equalized signal, creating a closed-loop system that continuously improves signal quality and reduces bit error rates

Inventive Principle:
Principle #23Feedback

2Reliability

If error correction algorithms like MLSE or ECC are implemented, then the bit error rate is reduced, but the device complexity increases

Engineering Contradiction:
Improvebit error rateVSAvoidalgorithm complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements error correction selectively rather than continuously. It uses error detection to identify when burst errors occur, and only then applies the computationally intensive MLSE or ECC correction algorithms. This partial action approach maintains reliability when needed while reducing average device complexity and computational burden during error-free periods

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the operational parameters of the error correction system based on detected error conditions. When burst errors are detected, the system switches to intensive correction modes (MLSE/ECC); when no errors are present, it operates in a lower-complexity mode. This dynamic parameter adjustment resolves the contradiction between reliability and device complexity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11316717B2Error correction method and apparatus
Publication Date: 2022.04.26 HUAWEI TECH CO LTD
  • US11316717B2 patent drawing
  • US11316717B2 patent drawing
  • US11316717B2 patent drawing

AI summary

Methods, systems, and apparatus for error correction are provided. In one aspect, an error correction method includes: obtaining an output signal and an amplitude value of a feed forward equalizer (FFE), the amplitude value being a channel response amplitude value corresponding to an equivalent channel of the FFE, performing level decision on the output signal based on the amplitude value to obtain a first decision signal including (2M−1) decision symbols, M being an integer not less than 2, performing (1/(1+D)) decoding on the first decision signal to obtain a first decoded signal, determining a second decision signal based on the first decoded signal, the second decision signal including (M−1) decision symbols, determining that a burst error occurs in the second decision signal if an absolute value of the second decision signal is greater than (M−1), and correcting the burst error in the second decision signal.