FFS Array Substrate Single Mask Semiconductor Layer
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Solution Overview
Problem
The traditional manufacturing method for FFS display mode with an etch stop layer (ESL) structure requires an increased number of masks, leading to higher process complexity and manufacturing costs.
Innovation Solution
A manufacturing method for an FFS mode array substrate that forms the channel semiconductor layer and common electrode layer in the same layer using a single mask, with doping to create the common electrode layer, and employs silicon nitride or silica insulation layers, allowing for the formation of through holes to expose the channel semiconductor layer, thereby simplifying the process and reducing the number of masks needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an etch stop layer (ESL) structure is adopted to improve TFT stability, then the stability of oxide TFT is improved, but the number of masks increases, leading to increased process complexity and manufacturing cost
Solution Approach 1:
The patent combines the ESL structure with the semiconductor layer by forming the common electrode layer directly within the semiconductor layer through selective doping. This merging eliminates the need for a separate ESL layer and its corresponding mask, while maintaining the protective function against back channel influences and etching damage.
Solution Approach 2:
The semiconductor layer serves multiple functions: it acts as both the active semiconductor layer for the TFT channel and as the etch stop layer (ESL) to protect against back channel influences and etching damage from source and drain electrodes. This multi-functionality is achieved through selective doping to create the common electrode layer within the semiconductor layer.
2Reliability
If an etch stop layer (ESL) structure is adopted to protect against etching damage, then the protection against etching damage is improved, but the manufacturing cost increases due to increased number of masks
Solution Approach 1:
The patent merges the ESL protective function with the semiconductor layer by forming the common electrode layer within the semiconductor layer. This eliminates the need for a separate ESL layer and its corresponding mask, reducing manufacturing cost while maintaining protection against etching damage from source and drain electrodes.
Solution Approach 2:
The semiconductor layer performs dual functions: serving as the active semiconductor layer and as the etch stop layer for protecting against etching damage. This is achieved through selective doping to create the common electrode layer, which provides the protective function without requiring additional masks or layers.
3Stability of the object's composition
If channel semiconductor layer and common electrode layer are formed in separate layers, then the structural stability is improved, but the process complexity and manufacturing cost increase
Solution Approach 1:
The patent combines the channel semiconductor layer and common electrode layer into a single semiconductor layer with different doped regions. The channel region remains lightly-doped or undoped while the common electrode region is heavily doped, eliminating the need for separate layers and reducing process complexity while maintaining structural stability.
Solution Approach 2:
The patent applies local quality by creating different doped regions within the same semiconductor layer. The channel region has one doping level while the common electrode region has a different doping level, allowing both functional regions to coexist in a single layer with optimized local properties for each function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces process complexity and manufacturing costs by allowing the channel and common electrode layers to be formed using a single mask, improving manufacturing efficiency and stability of the FFS display mode.
Implementation Method 1
doping the to-be-doped semiconductor layer to form a common electrode layer
Data Source
AI summary
An FFS mode array substrate and a manufacturing method thereof are provided. The FFS mode array substrate has: a glass substrate provided with a gate electrode thereon; a first insulation layer; a semiconductor layer having a channel region and a common electrode region to form a channel semiconductor layer on the channel region of the semiconductor layer, and form a common electrode layer on the common electrode region of the semiconductor layer by doping semiconductor thereon; and a second insulation layer provided with a first through hole and a second through hole therein.


