FFS Array Substrate Opening Drain Contact Hole

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Solution Overview

Problem

Fringe field switching (FFS) mode liquid crystal display devices face reduced transmittance due to the formation of drain contact holes, which create liquid crystal disclination regions and require a black matrix to cover the circumference, thereby decreasing the pixel's opening region and transmittance.

Innovation Solution

The solution involves removing the separate drain contact hole and forming an opening portion on an organic insulating layer to directly connect the thin-film transistor and pixel electrode, utilizing the area previously used for the drain contact hole as an opening area, and maintaining the photosensitive photo acryl layer to reduce parasitic capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a separate drain contact hole is formed to connect the drain electrode and pixel electrode, then electrical connection is achieved, but the opening region and transmittance of the pixel are reduced

Engineering Contradiction:
Improveelectrical connectionVSAvoidopening region
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the drain contact hole formation with the pixel electrode opening formation process. The pixel electrode is directly formed to expose the drain electrode through the same opening in the insulating layer, eliminating the need for a separate drain contact hole. This integration allows the electrical connection function and the light transmission function to share the same structural space, thereby resolving the contradiction between achieving reliable electrical connection and maintaining sufficient opening region.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If a black matrix is formed to cover the drain contact hole circumference, then liquid crystal disclination is prevented, but the opening region and transmittance are further reduced

Engineering Contradiction:
Improveliquid crystal alignmentVSAvoidopening region
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts and eliminates the black matrix component from the structure. By directly forming the pixel electrode to expose the drain electrode without creating a separate drain contact hole, the condition that would require black matrix coverage is removed entirely. This extraction of the problematic structural element prevents liquid crystal disclination while simultaneously preserving the opening region and transmittance, as no black matrix is needed to cover a non-existent separate contact hole.

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If the photosensitive photo acryl layer is removed, then fabrication complexity is reduced, but parasitic capacitance increases

Engineering Contradiction:
Improvefabrication processVSAvoidparasitic capacitance
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent maintains the photosensitive photo acryl layer and assigns it multiple functions: it serves as the insulating layer, as the layer to be opened for pixel electrode formation, and as a parasitic capacitance reduction layer. By making this single layer multi-functional, the patent avoids the need to add additional layers or complex fabrication steps, thereby maintaining fabrication simplicity while simultaneously reducing parasitic capacitance through the preserved photo acryl layer.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8760595B2Array substrate for fringe field switching mode liquid crystal display device and method for fabricating the same
Publication Date: 2014.06.24 LG DISPLAY CO LTD
  • US8760595B2 patent drawing
  • US8760595B2 patent drawing
  • US8760595B2 patent drawing

AI summary

Fringe field switching (FFS) mode liquid crystal display device and method for fabricating the same, are discussed, the device including a gate line formed in one direction on a surface of a first substrate; a data line formed on the first substrate, and crossed with the gate line to thereby define a pixel region; a thin-film transistor formed on the first substrate, and formed at an intersection of the gate line and the data line; an insulating layer having an opening portion located at an upper portion of the thin-film transistor to expose at least a gate portion of the thin-film transistor; a pixel electrode formed at an upper portion of the insulating layer, and connected to the exposed thin-film transistor; a passivation layer formed at the upper portion of the insulating layer; and common electrodes formed at an upper portion of the passivation layer and separated from one another.