Fringe Field Switching Display Substrate Mask Reduction
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Solution Overview
Problem
The manufacturing process for fringe field switching (FFS) mode liquid crystal display (LCD) panels is complex and costly due to the need for multiple masks, which increases production expenses.
Innovation Solution
A display substrate design that includes a first metal pattern with a gate line and signal line, a first insulation layer, a first electrode, and a second metal pattern with a connecting electrode and data line, where the second electrode generates a fringe field with the first electrode, and a method for manufacturing this substrate that simplifies the process by using fewer masks, including etching techniques and transparent conductive materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple masks are used in the manufacturing process for FFS mode LCD panel, then the manufacturing precision and electrode pattern accuracy are improved, but the manufacturing cost and process complexity increase
Solution Approach 1:
The patent combines the gate line and signal line into a single first metal pattern layer, and merges the connecting electrode and data line into a second metal pattern layer. This consolidation reduces the number of separate patterning steps and masks required, thereby simplifying the manufacturing process while maintaining the precision of electrode patterns through optimized layer integration.
Solution Approach 2:
The first metal pattern serves multiple functions by simultaneously forming both the gate line and signal line. The second metal pattern similarly performs dual functions as both connecting electrode and data line. This multi-functionality approach reduces the overall number of pattern layers and corresponding masks needed in the manufacturing process.
2Manufacturing precision
If multiple masks are used in the manufacturing process for FFS mode LCD panel, then the electrode pattern accuracy is improved, but the manufacturing cost increases
Solution Approach 1:
By merging the gate line and signal line into one metal pattern layer, and combining the connecting electrode and data line into another layer, the patent reduces the total number of photolithography masks required. This consolidation directly lowers manufacturing costs while preserving pattern accuracy through optimized layer design and fewer processing steps.
3Ease of manufacture
If the number of masks in manufacturing process is decreased, then the manufacturing cost is reduced, but the manufacturing precision may be compromised
Solution Approach 1:
The patent segments the electrode structure into distinct metal pattern layers with clear functional assignments. The first metal pattern layer contains gate and signal lines, while the second metal pattern layer contains connecting electrodes and data lines. This segmentation allows each layer to be optimized independently, maintaining high manufacturing precision even with reduced mask count by eliminating redundant patterning steps.
4Reliability
If conventional FFS mode manufacturing process is used, then the electrode structure is complex and complete, but the production time and expenses increase
Solution Approach 1:
The patent merges multiple electrode functions into consolidated metal pattern layers, reducing the total number of patterning operations required. This approach maintains complete and reliable electrode structures while significantly reducing production time and manufacturing expenses by eliminating redundant process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces manufacturing costs and simplifies the process by minimizing the number of masks required, thereby decreasing production time and expenses while maintaining the performance of the FFS mode LCD panel.
Implementation Method 1
The second electrode can generate a fringe field with the first electrode
Implementation Method 2
The FFS mode uses birefringence generated by liquid crystal molecules
Data Source
AI summary
A display substrate includes a first metal pattern including a gate line and a signal line, a first insulation layer formed on a substrate where the first metal pattern is formed, a first electrode formed on the first insulation layer, and a second metal pattern including a connecting electrode and a data line. The first insulation layer includes a first opening portion exposing a portion of the signal line. The first electrode corresponds to a unit pixel. The connecting electrode is connected to the first electrode and the signal line through the first opening portion.


