FFS Array Substrate Electrode Layout for Lower Signal Crosstalk
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Solution Overview
Problem
In FFS mode display panels, the large opposite area between mesh-shaped top electrodes and data lines leads to high lateral coupling capacitance and increased risk of signal crosstalk due to consistent top electrode structures.
Innovation Solution
The array substrate design includes a first electrode with sub-electrodes having main and branch portions arranged to reduce the face-to-face area with data lines, creating a hollowed-out portion that decreases lateral coupling capacitance and signal crosstalk, with scanning and common signal lines defining sub-pixel areas to reduce the number of data lines and manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a mesh-shaped top electrode is used in FFS mode display panels, then the electrode can provide sufficient capacitance and electrical performance, but the large opposite area between the electrode and data line leads to high lateral coupling capacitance and increased signal crosstalk risk
Solution Approach 1:
The first electrode is divided into multiple branches along the second direction, creating multiple first spaces between adjacent branches. This segmentation reduces the continuous opposite area between the electrode and data line, thereby reducing lateral coupling capacitance and signal crosstalk risk while maintaining sufficient capacitance through distributed electrode structure
Solution Approach 2:
The electrode structure is designed with different characteristics in different regions: the branches are arranged with specific spacing to create local hollowed-out portions where lateral coupling capacitance is harmful, while maintaining adequate electrode area in regions where capacitance is needed for electrical performance
2Area of stationary object
If traditional mesh-shaped electrodes with consistent structures are used in adjacent sub-pixel regions, then manufacturing is simplified, but the large opposite area with data lines produces high lateral coupling capacitance
Solution Approach 1:
The electrode is segmented into branches with spaces between them, creating hollowed-out portions that reduce lateral coupling capacitance. This segmentation achieves both the goal of increasing hollowed-out area and reducing capacitance, while the regular branching pattern keeps manufacturing complexity manageable
Solution Approach 2:
The electrode structure parameters are optimized by controlling the number, spacing, and arrangement of branches. By adjusting these parameters, the hollowed-out area is increased to reduce lateral coupling capacitance while maintaining manufacturing feasibility through standardized design rules
3Reliability
If the first electrode is designed with branches and spaces to reduce lateral coupling capacitance, then signal crosstalk is reduced, but the storage capacitor area between electrodes may be affected
Solution Approach 1:
The electrode is segmented into branches that create localized spaces for reducing lateral coupling capacitance, while the overall electrode area is maintained sufficient for storage capacitance. The segmentation is designed to reduce harmful lateral coupling in specific regions while preserving adequate capacitance area
Solution Approach 2:
Different regions of the electrode structure serve different functions: the branched portions with spaces reduce lateral coupling capacitance locally, while the overall electrode configuration maintains sufficient storage capacitor area between electrodes for proper electrical performance
Data Source
AI summary
An array substrate includes a first electrode, scanning lines extending along a first direction, data lines, and common signal lines. The data lines and the common signal lines extend along a second direction. The first electrode includes a first and a second sub-electrode. Each data line is disposed between two common signal lines. Two scanning lines, two common signal lines, and a data line define a first and a second sub-pixel area. The first and the second sub-electrode are disposed within the first and the second sub-pixel area respectively. The first sub-electrode includes a first main portion disposed close to a common signal line and first branch portions spaced along the second direction. A first space is defined between two adjacent first branch portions. Ends of the first branch portions are connected to the first main portion. Another ends of the first branch portions are spaced with a first space.