FFS LCD Array Substrate Reducing Mask Processes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The manufacturing of fringe field switching mode liquid crystal display devices is hindered by the need for multiple mask processes, which increases costs and reduces productivity due to the complexity and time required for each step.
Innovation Solution
A method and array substrate for a fringe field switching mode liquid crystal display device that reduces the number of mask processes by forming a gate line, gate electrode, and pixel electrode, followed by a gate insulating layer, data line, source and drain electrodes, passivation layer, and common electrode, with a connection pattern that contacts the drain and pixel electrodes, thereby simplifying the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple mask processes are used to form gate line, gate electrode, pixel electrode, data line, source and drain electrodes, then the structural integrity and electrical connections are ensured, but the manufacturing complexity and time increase, reducing productivity
Solution Approach 1:
The patent combines multiple mask processes into fewer processes by merging the formation of gate line, gate electrode, and pixel electrode into a single mask process, and similarly merging data line, source electrode, and drain electrode formation into another process. This reduces the total number of mask processes from five to four, thereby improving productivity while maintaining structural integrity through the connection pattern that ensures proper electrical connections between electrodes.
2Manufacturing precision
If five mask processes are used for manufacturing, then precise electrode and line formation is achieved, but the manufacturing cost and time increase
Solution Approach 1:
The patent merges the formation of multiple electrodes and lines into fewer mask processes. Specifically, the gate line, gate electrode, and pixel electrode are formed in one mask process, and the data line, source electrode, and drain electrode are formed in another process. This consolidation maintains manufacturing precision by ensuring proper alignment and connection through the connection pattern, while reducing the total manufacturing cycle time by eliminating redundant masking steps.
3Manufacturing precision
If five mask processes are used, then complete electrode patterning is achieved, but the number of materials and equipment needed increases
Solution Approach 1:
The patent reduces manufacturing process complexity by merging five mask processes into four. The first process forms the gate line, gate electrode, and pixel electrode together. The second process forms the data line, source electrode, and drain electrode together. This merging maintains complete electrode patterning because the connection pattern is specifically designed to ensure proper electrical connections between all electrodes, while reducing the number of materials and equipment needed for each additional masking step.
Data Source
AI summary
A method of manufacturing an array substrate for an FFS mode LCD device includes forming a gate line, a gate electrode and a pixel electrode on a substrate; forming a gate insulating layer; forming a data line, source and drain electrodes, and a semiconductor layer on the gate insulating layer, the drain electrode overlapping the pixel electrode; forming a passivation layer on the data line, the source and drain electrodes; forming a contact hole exposing the drain electrode and the pixel electrode by patterning the passivation layer and the gate insulating layer; and forming a common electrode and a connection pattern on the passivation layer, wherein the common electrode includes bar-shaped openings and a hole corresponding to the contact hole, and the connection pattern is disposed in the hole, is spaced apart from the common electrode and contacts the drain electrode and the pixel.