FFT Circuit Dynamic Data Extraction for Computation Accuracy
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Solution Overview
Problem
Conventional fast Fourier transform circuits face computation errors due to bit width limitations, leading to overflows and underflows when extracting data from butterfly computations, as the fixed data extraction range may not be suitable for all input data characteristics.
Innovation Solution
A fast Fourier transform circuit that performs butterfly computations on 2n points of input data, with a component to extract data in a pre-specified range matching the input data's bit width at each stage, ensuring effective data for subsequent computations and reducing computation errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed data extraction range is used in conventional FFT circuits, then the circuit structure remains simple, but computation errors occur due to bit width limitations and overflow/underflow issues
Solution Approach 1:
The patent applies the dynamics principle by making the data extraction range adjustable rather than fixed. The extraction range is dynamically changed according to the stage number of butterfly computations, allowing the circuit to adapt to different computational requirements at each stage while maintaining computational accuracy and avoiding overflow/underflow issues.
Solution Approach 2:
The patent changes the parameter of data extraction range based on the stage number. By varying the extraction range parameter according to the computational stage, the system optimizes computation accuracy at each stage while managing bit width limitations, thus resolving the contradiction between reliability and complexity.
2Measurement precision
If data extraction range is adjusted dynamically based on input data characteristics, then computation errors are reduced, but circuit complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-defining multiple extraction ranges corresponding to different stage numbers before computation begins. The appropriate extraction range is selected based on the current stage number, eliminating the need for real-time analysis of input data characteristics and reducing circuit complexity while maintaining computation precision.
Solution Approach 2:
The extraction range parameter is changed systematically according to the stage number progression. This parameter change approach improves computation precision by adapting to the computational characteristics at each stage without requiring complex real-time data analysis mechanisms.
3Ease of manufacture
If fixed-point computation with limited bit width is used, then circuit implementation is simpler, but overflow and underflow errors occur during butterfly computations
Solution Approach 1:
The patent uses dynamics by making the data extraction range adaptable to different computational stages. This dynamic adjustment allows the fixed-point computation system to handle varying data magnitudes throughout the butterfly computation process, preventing overflow and underflow while maintaining simple circuit implementation.
Solution Approach 2:
The computation process is segmented into multiple stages, with each stage using an appropriate extraction range. This segmentation allows the system to manage bit width limitations effectively at each stage while maintaining overall computation reliability and simple circuit structure.
Data Source
AI summary
A fast Fourier transform circuit includes a computation component, an extraction component and a setting component. The extraction component, at each step of the computation, extracts, from computation result data points calculated by the computation component, data in a pre-specified range with a number of bits the same as a predetermined number of bits, which is an effective range for a butterfly computations. The setting component sets the data points of the predetermined number of bits which have been extracted by the extraction component to serve as input data when butterfly computations of a next step are to be performed by the computation component.