1D-FFT Processor Memory Bank Shifting for Hologram Processing

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Solution Overview

Problem

Current technologies face significant computational challenges and time constraints when performing Fourier transforms, particularly in portable devices like mobile phones, due to the high computational load required for processing three-dimensional hologram images, which limits their ability to efficiently reproduce hologram moving pictures.

Innovation Solution

The proposed solution involves a method and apparatus that utilize a multiple 1D-FFT processor to efficiently perform Fourier transforms by dividing and storing intermediate data across multiple memory banks, allowing for parallel processing and reduced computational overhead by shifting bank start positions and optimizing data storage and retrieval.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single Fourier transform is performed for each pixel to represent one point in space, then hologram image quality is improved, but computational amount and processing time increase significantly

Engineering Contradiction:
Improvehologram image qualityVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent divides the two-dimensional Fourier transform into two separate one-dimensional Fourier transforms (row direction and column direction). Multiple 1D-FFT processors independently perform row-direction transforms simultaneously, then column-direction transforms are applied to the intermediate results. This segmentation enables parallel processing while maintaining the quality of the complete 2D transform.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential 2D transform processing to a two-dimensional processing architecture by introducing both row-direction and column-direction 1D-FFT processors working in parallel. This dimensional expansion of the processing architecture significantly increases throughput while preserving transform accuracy.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If intermediate FFT data is stored in a single memory bank, then device complexity is reduced, but processing delays occur due to bank conflicts

Engineering Contradiction:
Improvememory structure simplicityVSAvoidprocessing delay
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent divides the memory into multiple banks and distributes intermediate FFT data across these banks based on processor identifiers. Each 1D-FFT processor stores its results in a specific bank, allowing simultaneous writes without conflict. This segmentation of memory resources eliminates bank conflicts and enables continuous parallel processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a memory address generator that acts as an intermediary to automatically calculate and manage the distribution of data across multiple memory banks. This mediator handles the complexity of bank selection and data routing, allowing simple processor units to efficiently utilize multi-bank memory without direct complexity in the processors themselves.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If multiple 1D-FFT processors are used for parallel processing, then productivity is improved, but device complexity increases due to multiple processors and memory banks

Engineering Contradiction:
ImproveFourier transform processing speedVSAvoidprocessor and memory structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent designs 1D-FFT processors that can function universally in both row-direction and column-direction transform operations. The same processor architecture is reused for different transform directions, reducing the need for specialized hardware and minimizing overall device complexity while maintaining high parallel processing capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements automatic bank selection and data distribution mechanisms where the system self-manages the complexity of coordinating multiple processors and memory banks. The address generator and control logic automatically handle resource allocation and data routing, allowing the parallel processing system to operate efficiently without requiring complex external control.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3182375B1Apparatus and method for performing fourier transform
Publication Date: 2024.10.23 SAMSUNG ELECTRONICS CO LTD
  • EP3182375B1 patent drawingFigure 1
  • EP3182375B1 patent drawingFigure 2
  • EP3182375B1 patent drawingFigure 3

AI summary

A method for performing a Fourier transform includes generating intermediate data by performing a 1 D FFT on input image data on a row-by-row basis, designating different banks of a memory as respective start positions, dividing and storing the intermediate data at the start positions, reading out the intermediate data at the start positions, and generating final data by performing a 1 D FFT on the intermediate data on a column-by-column basis.