Parallel FFT Data Access via Multi-Granularity Memory Segmentation
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Solution Overview
Problem
Existing parallel FFT computation methods face inefficiencies due to memory access conflicts and synchronization issues among processors, particularly when dealing with different data lengths and read/write granularities, which complicates the implementation of parallel computations.
Innovation Solution
The method involves dividing initial FFT data into groups based on a parallel granularity and storing them in multi-granularity parallel memories, allowing for parallel butterfly computation with alternating data access between memory blocks, ensuring efficient read/write operations without conflicts through a ping-pong configuration and uniform butterfly representation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple processors access memory simultaneously for parallel FFT computation, then computation efficiency is improved, but memory access conflicts and synchronization issues occur
Solution Approach 1:
The patent segments the FFT data into multiple blocks and divides computation into stages, where each processor handles specific data blocks. Memory access is segmented by creating separate read/write paths for different data blocks, eliminating conflicts. The computation is divided into stages with each stage processing specific portions of data independently.
Solution Approach 2:
The patent introduces buffer memory as an intermediary between processors and main memory. Buffers are used to store data temporarily during computation stages, allowing processors to read/write without direct memory conflicts. The buffer acts as a mediator that coordinates access between multiple processors.
2Productivity
If dedicated memories and data buffers are used for parallel read/write, then parallel access is achieved, but device complexity and implementation difficulty increase
Solution Approach 1:
The patent makes the existing memory structure universal by enabling it to perform both storage and buffering functions. The same memory blocks used for data storage also serve as buffers for parallel read/write operations. This eliminates the need for separate dedicated buffer memories, reducing complexity while maintaining parallel capability.
Solution Approach 2:
The patent merges the buffer function with the existing memory structure. Instead of having separate dedicated buffers and data memories, the system combines these functions into a unified memory architecture where memory blocks serve dual purposes. This integration simplifies the overall device structure.
3Productivity
If complex address calculation is used for data distribution, then parallel read/write is enabled, but implementation difficulty increases
Solution Approach 1:
The patent performs preliminary action by pre-calculating and storing the mapping relationships between data blocks and memory addresses. The distribution pattern is established in advance through the staged computation approach, where each stage knows exactly which memory blocks to access. This eliminates complex real-time address calculation.
Solution Approach 2:
The patent changes the approach from complex address calculation to parameter-based access control. Instead of calculating addresses dynamically, the system uses computation stage parameters and data block indices to determine memory access patterns. This simplifies the control logic and makes implementation easier.
Data Source
AI summary
A data access method and device for parallel FFT computation. In the method, FFT data and twiddle factors are stored in multi-granularity parallel memories, and divided into groups throughout the computation flow according to a uniform butterfly representation. Each group of data involves multiple butterflies that support parallel computation. Meanwhile, according to the butterfly representation, it is convenient to generate data address and twiddle factor coefficient address for each group. With different R/W granularities, it is possible to read/write data and corresponding twiddle factors in parallel from the multi-granularity memories. The method and device further provide data access devices for parallel FFT computation. In the method and device, no conflict will occur during read/write operations of memories, and no extract step is required for sorting the read/written data. Further, the method and device can flexibly define the parallel granularity according to particular applications.